P
RODUCT
B
RIEF
Infineon’s VDSL5100 standard VDSL single port
chip set provides highly flexible solutions for
Ethernet and ATM applications over VDSL.
Access system designers’ requirements are
addressed by providing flexible band allocation
plans and PSDs. VDSL5100 also supports Band 0
to extend VDSL services up to 4 km (13,200 ft.)
over ADSL frequencies.
Infineon’s VDSL5100 chip set uses Frequency
Division Multiplexing (FDM) and Quadrature
Amplitude Modulation (QAM) to provide simple,
low-cost, low-power, and very robust operation.
Infineon’s VDSL5100 is designed to coexist with
voice, ISDN, and other xDSL technologies in the
same bundle.
With Infineon’s software configurable VDSL5100
chip set, system vendors can use a single design
to support a wide variety of transport protocols.
The VDSL5100 is ideal for universal DSLAM
linecards and CPE designs.
Applications
s
Customer Premises Equipment
(CPE)
s
DSLAM and residential gateways
s
Ethernet and ATM over VDSL for
last mile access solutions
s
Fiber and broadband wireless
extension over copper wire
s
Multiple Dwelling/Tenant Units
(MDU/MTU) networking
s
LAN extentsions up to 1,200 m
(4,000 ft.)
s
Upgrades of HDSL, SDSL and
ADSL systems
Features
s
Ethernet and ATM single port chip
set
s
Highly integrated, standard
compliant, VDSL QAM transport
modem
s
Low power consumption
s
T1E1.4, ETSI, and ITU-T
compliant high speed VDSL PHY
applications
s
Ethernet transfer over AAL5 and
RFC 2684
s
Frequency Division Duplexing
(FDD)
2, 3, or 4-band operation,
including Band 0
VDSL5100
Interfaces
s
s
MII/SMII/SS-SMII/RMII
compliant with the 802.3 Ethernet
specification
ATM UTOPIA Level 1 and
Level 2, 8-bit, 33 MHz
32-channel Pulse Code
Modulation (PCM), maximum
2 Mbit/s over the fast channel
MII serial management interface
to access all internal registers
External parallel host port
Serial UART interface to a
standard serial terminal
EEPROM interface via IIC
IEEE 1149.1 JTAG test port
s
Dual latency support with built-in
interleaver memory
Power Back Off
Embedded crystal oscillator
(DCXO) for timing recovery
Spectral allocation allows noise
free operation with xDSL, ISDN,
TCM-ISDN and digital PBX
Versatile and completely flexible
band allocations
Backward compatibility with
Infineon’s legacy chip sets
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Performance
s
Asymmetric DS/US data rates of
70/40 Mbit/s and Symmetric data
rates up to 50 Mbit/s
Asymmetric DS/US data rates of
4/0.6 Mbit/s up to 4 km (13,200 ft.)
Power Requirements
s
s
s
3.3 V and 1.2 V for the PEF 22818
1.8 V for the PEF 22815
±5 V for the PEF 22810
s
VDSL5100
5th Generation Single-port Standard VDSL Chip Set
VDSL5100-D, PEF 22818
4bVDSL-A, PEF 22815
VDSL-L, PEF 22810
N e v e r
s t o p
t h i n k i n g .
P
RODUCT
B
RIEF
Interleaver
xMII/ UTOPIA/PCM Interface
Framer
RS-Encoder
QAM
Modulator
DAC
DAC
13-Bit
Power
Control
Post
Filter
Broadband
Amplifier
SRAM
Automatic Gain Control
Variable
VDSL-L PEF 22810
DeInterleaver
RS-Decoder
QAM
Deframer
Demodulator
ADC
ADC
12-Bit
Gain
Prefilter
Amplifier
Serial I/F
Program SRAM
Bootstrap Code
PLL
4bVDSL-A PEF 22815
PLL
Micro Controller
AFE Control Interface
Serial and Parallel Host Interface
VDSL5100-D PEF 22818
VDSL5100 Block Diagram
Ordering Information
Design Tools
Product Name
VDSL5100-E Ethernet over VDSL
Evaluation/Demo Kit
VDSL5100-A ATM over VDSL
Evaluation/Demo Kit
Sales Code
VDSL5100-E
VDSL5100-A
Description
The VDSL5100-E Evaluation/Demo Kit includes two identi-
cal boards and the VDSL5100-E software package.
The VDSL5100-A Evaluation/Demo Kit includes two identi-
cal boards plus a VDSL5100-E board to demonstrate the
SAR application, and the VDSL5100-A software package.
Chip Set
Product Name
VDSL5100-D
4bVDSL-A
VDSL-L
PEF 22818
VDSL5100-D
Digital
Transceiver
Sales Code
PEF 22818 E
PEF 22815 F
PEF 22810 T
PEF 22815
4bVDSL-A
Package
P-TQFP-64
P-DSO-8
Description
4-band Analog Front End
VDSL Line Driver
P-TQFP-144-10 Single-port Digital Transceiver
Ethernet PHY
VDSL-L
Analog
Line
Front End
Driver
VDSL5100 PHY
Ethernet over VDSL Linecard Application Example
How to reach us:
http://www.infineon.com
Published by
Infineon Technologies AG,
St.-Martin-Strasse 53,
81669 München
© Infineon Technologies AG 2003. All Rights Reserved.
Attention please!
The information herein is given to describe certain components
and shall not be considered as warranted characteristics.
Terms of delivery and rights to technical change reserved.
We hereby disclaim any and all warranties, including but not
limited to warranties of non-infringement, regarding circuits,
descriptions and charts stated herein.
Infineon Technologies is an approved CECC manufacturer.
Information
For further information on technology, delivery terms
and conditions and prices please contact your nearest
Infineon Technologies Office in Germany or our Infineon
Technologies Representatives worldwide.
Warnings
Due to technical requirements components may contain dan-
gerous substances. For information on the types in question
please contact your nearest Infineon Technologies Office.
Infineon Technologies Components may only be used in life-
support devices or systems with the express written approval
of Infineon Technologies, if a failure of such components can
reasonably be expected to cause the failure of that life-support
device or system, or to affect the safety or effectiveness of that
device or system. Life support devices or systems are intend-
ed to be implanted in the human body, or to support and/or
maintain and sustain and/or protect human life. If they fail, it is
reasonable to assume that the health of the user or other per-
sons may be endangered.
B115-H8179-X-X-7600
Printed in Germany
Published by Infineon Technologies AG
Hybrid/
Splitter
10/100BaseT
Ethernet
PEF 22810
Ethernet
over VDSL
Real-time operating system RTOS
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