TISP61089A
DUAL FORWARD-CONDUCTING P-GATE THYRISTORS
PROGRAMMABLE OVERVOLTAGE PROTECTORS
Copyright © 1999, Power Innovations Limited, UK
JUNE 1999
PROGRAMMABLE SLIC OVERVOLTAGE PROTECTION FOR LSSGR ‘1089
q
Dual Voltage-Programmable Protectors
- Wide 0 to -110 V Programming Range
- Low 5 mA max. Gate Triggering Current
- High 150 mA min. Holding Current
Rated for LSSGR ‘1089 Conditions
WAVE SHAPE
2/10 µs
10/1000 µs
60 Hz POWER
FAULT TIME
100 ms
1s
5s
300 s
900 s
‘1089 TEST CLAUSE
AND TEST #
4.5.8 Second-Level 1
4.5.7 First-Level 3
‘1089 TEST CLAUSE
AND TEST #
4.5.13 Second-Level 2
4.5.13 Second-Level 2
4.5.13 Second-Level 2
4.5.13 Second-Level 1
4.5.13 Second-Level 1
I
TSP
A
120
30
I
TSM
A
10
4.4
2.1
0.84
0.83
D PACKAGE
(TOP VIEW)
(Tip)
K1
NC
1
2
3
4
8
7
6
5
K1 (Tip)
A
A
(Ground)
(Ground)
MD6XAN
(Gate) G
(Ring) K2
q
K2 (Ring)
NC - No internal connection
Terminal typical application names shown in
parenthesis
P PACKAGE
(TOP VIEW)
(Tip)
K1
1
2
3
4
8
7
6
5
K1 (Tip)
A
A
(Ground)
(Ground)
(Gate) G
NC
(Ring) K2
K2 (Ring)
MD6XAV
q
2/10 Protection Voltage Specified
ELEMENT
Diode
Crowbar
V
GG
= -48 V
FIRST-LEVEL
V @ 56 A
6
-57
SECOND-LEVEL
V @ 100 A
8
-60
NC - No internal connection
Terminal typical application names shown in
parenthesis
device symbol
K1
G
K2
q
q
Also Rated for ITU-T 10/700 impulses
Surface Mount and Through-Hole Options
- TISP61089AP for Plastic DIP
- TISP61089AD for Small-Outline
- TISP61089ADR for Small-Outline Taped
and Reeled
A
SD6XAE
description
The TISP61089A is a dual forward-conducting
Terminals K1, K2 and A correspond to the alternative
buffered p-gate overvoltage protector. It is
line designators of T, R and G or A, B and C. The
negative protection voltage is controlled by the voltage,
designed to protect monolithic SLICs (Subscriber
V
GG,
applied to the G terminal.
Line Interface Circuits) against overvoltages on
the telephone line caused by lightning, a.c.
power contact and induction. The TISP61089A limits voltages that exceed the SLIC supply rail voltage. The
TISP61089A parameters are specified to allow equipment compliance with Bellcore GR-1089-CORE,
Issue 1.
The SLIC line driver section is typically powered from 0 V (ground) and a negative voltage in the region of
-10 V to -100 V. The protector gate is connected to this negative supply. This references the protection
(clipping) voltage to the negative supply voltage. As the protection voltage will then track the negative supply
voltage the overvoltage stress on the SLIC is minimised.
PRODUCT
INFORMATION
1
Information is current as of publication date. Products conform to specifications in accordance
with the terms of Power Innovations standard warranty. Production processing does not
necessarily include testing of all parameters.
TISP61089A
DUAL FORWARD-CONDUCTING P-GATE THYRISTORS
PROGRAMMABLE OVERVOLTAGE PROTECTORS
JUNE 1999
Positive overvoltages are clipped to ground by diode forward conduction. Negative overvoltages are initially
clipped close to the SLIC negative supply rail value. If sufficient current is available from the overvoltage, then
the protector will crowbar into a low voltage on-state condition. As the overvoltage subsides the high holding
current of the crowbar prevents d.c. latchup.
The TISP61089A is intended to be used with a series combination of a 25
Ω
or higher resistance and a
suitable overcurrent protector. Power fault compliance requires the series overcurrent element to open-circuit
or become high impedance (see Applications Information). For equipment compliant to ITU-T
recommendations K20 or K21 only, the series resistor value is set by the power cross requirements. For K20
and K21, a minimum series resistor value of 10
Ω
is recommended.
These monolithic protection devices are fabricated in ion-implanted planar vertical power structures for high
reliability and in normal system operation they are virtually transparent. The TISP61089A buffered gate
design reduces the loading on the SLIC supply during overvoltages caused by power cross and induction.
The TISP61089A is available in 8-pin plastic small-outline surface mount package and 8-pin plastic dual-in-
line package.
absolute maximum ratings
RATING
Repetitive peak off-state voltage, I
G
= 0, -40°C
≤
T
J
≤
85°C
Repetitive peak gate-cathode voltage, V
KA
= 0, -40°C
≤
T
J
≤
85°C
Non-repetitive peak on-state pulse current (see Notes 1 and 2)
10/1000 µs (Bellcore GR-1089-CORE, Issue 1, November 1994, Section 4)
5/320 µs (ITU-T recommendation K20 & K21, open-circuit voltage wave shape 10/700)
1.2/50 µs (Bellcore GR-1089-CORE, Issue 1, November 1994, Section 4, Alternative)
2/10 µs (Bellcore GR-1089-CORE, Issue 1, November 1994, Section 4)
Non-repetitive peak on-state current, 60 Hz (see Notes 1 and 2)
0.1 s
1s
5s
300 s
900 s
Non-repetitive peak gate current, 1/2 µs pulse, cathodes commoned (see Notes 1 and 2)
Operating free-air temperature range
Junction temperature
Storage temperature range
I
GSM
T
A
T
J
T
stg
I
TSM
10
4.4
2.1
0.84
0.83
40
-40 to +85
-40 to +150
-40 to +150
A
°C
°C
°C
A
I
TSP
30
40
100
120
A
SYMBOL
V
DRM
V
GKRM
VALUE
-120
-120
UNIT
V
V
NOTES: 1. Initially the protector must be in thermal equilibrium with -40°C
≤
T
J
≤
85°C. The surge may be repeated after the device returns to
its initial conditions.
2. The rated current values may be applied either to the Ring to Ground or to the Tip to Ground terminal pairs. Additionally, both
terminal pairs may have their rated current values applied simultaneously (in this case the Ground terminal current will be twice the
rated current value of an individual terminal pair). Above 85°C, derate linearly to zero at 150°C lead temperature.
recommended operating conditions
MIN
C
G
R
S
Gate decoupling capacitor
TISP61089A series resistor for first-level and second-level surge survival
TISP61089A series resistor for first-level surge survival
100
40
25
TYP
220
MAX
UNIT
nF
Ω
PRODUCT
2
INFORMATION
TISP61089A
DUAL FORWARD-CONDUCTING P-GATE THYRISTORS
PROGRAMMABLE OVERVOLTAGE PROTECTORS
JUNE 1999
electrical characteristics, T
J
= 25°C (unless otherwise noted)
PARAMETER
I
D
Off-state current
V
D
= V
DRM
, I
G
= 0
TEST CONDITIONS
T
J
= 25°C
T
J
= 85°C
-57
-60
-60
-64
3
6
8
8
12
-150
T
J
= 25°C
T
J
= 85°C
-5
-50
5
2.5
0.1
100
50
mA
µA
µA
mA
V
µC
pF
pF
V
V
V
MIN
TYP
MAX
-5
-50
UNIT
µA
µA
2/10 µs, I
T
= -56 A, R
S
= 45
Ω,
V
GG
= -48 V, C
G
= 220 nF
V
(BO)
Breakover voltage
2/10 µs, I
T
= -100 A, R
S
= 50
Ω,
V
GG
= -48 V, C
G
= 220 nF
1.2/50 µs, I
T
= -53 A, R
S
= 47
Ω,
V
GG
= -48 V, C
G
= 220 nF
1.2/50 µs, I
T
= -96 A, R
S
= 52
Ω,
V
GG
= -48 V, C
G
= 220 nF
V
F
Forward voltage
Peak forward recovery
voltage
Holding current
Gate reverse current
Gate trigger current
Gate trigger voltage
Gate switching charge
Anode-cathode off-
state capacitance
I
F
= 5 A, t
w
= 200 µs
2/10 µs, I
F
= 56 A, R
S
= 45
Ω,
V
GG
= -48 V, C
G
= 220 nF
V
FRM
2/10 µs, I
F
= 100 A, R
S
= 50
Ω,
V
GG
= -48 V, C
G
= 220 nF
1.2/50 µs, I
F
= 53 A, R
S
= 47
Ω,
V
GG
= -48 V, C
G
= 220 nF
1.2/50 µs, I
F
= 96 A, R
S
= 52
Ω,
V
GG
= -48 V, C
G
= 220 nF
I
H
I
GKS
I
GT
V
GT
Q
GS
C
AK
I
T
= -1 A, di/dt = 1A/ms, V
GG
= -48 V
V
GG
= V
GK
= V
GKRM
, V
KA
= 0
I
T
= 3 A, t
p(g)
≥
20 µs, V
GG
= -48 V
I
T
= 3 A, t
p(g)
≥
20 µs, V
GG
= -48 V
1.2/50 µs, I
T
= 53 A, R
S
= 47
Ω,
V
GG
= -48 V C
G
= 220 nF
f = 1 MHz, V
d
= 1 V, I
G
= 0, (see Note 3)
V
D
= -3 V
V
D
= -48 V
NOTE
3: These capacitance measurements employ a three terminal capacitance bridge incorporating a guard circuit. The unmeasured
device terminals are a.c. connected to the guard terminal of the bridge.
thermal characteristics
PARAMETER
TEST CONDITIONS
T
A
= 25 °C, EIA/JESD51-3
R
θJA
Junction to free air thermal resistance
PCB, EIA/JESD51-2
environment, P
TOT
= 1.7 W
D Package
P Package
MIN
TYP
MAX
120
°C/W
100
UNIT
PRODUCT
INFORMATION
3
TISP61089A
DUAL FORWARD-CONDUCTING P-GATE THYRISTORS
PROGRAMMABLE OVERVOLTAGE PROTECTORS
JUNE 1999
PARAMETER MEASUREMENT INFORMATION
+i
I
FSP
(= |I
TSP
|)
Quadrant I
Forward
Conduction
Characteristic
I
FSM
(= |I
TSM
|)
I
F
V
F
V
GK(BO)
V
GG
V
D
I
D
-v
+v
I
(BO)
I
S
I
H
V
T
I
T
I
TSM
V
(BO)
V
S
Quadrant III
Switching
Characteristic
I
TSP
-i
PM6XAAA
Figure 1. VOLTAGE-CURRENT CHARACTERISTIC
PRODUCT
4
INFORMATION
TISP61089A
DUAL FORWARD-CONDUCTING P-GATE THYRISTORS
PROGRAMMABLE OVERVOLTAGE PROTECTORS
JUNE 1999
THERMAL INFORMATION
NON-REPETITIVE PEAK ON-STATE CURRENT
vs
CURRENT DURATION
TI6HAC
I
TSM(t)
- Non-Repetitive Peak On-State Current - A
10
9
8
7
6
5
4
3
V
GEN
= 600 Vrms, 50/60 Hz
R
GEN
= 1.4*V
GEN
/I
TSM(t)
EIA/JESD51-2 ENVIRONMENT
EIA/JESD51-3 PCB
T
A
= 25 °C
GROUND RETURN = 2xI
TSM(t)
2
1.5
1
0.9
0.8
0.7
0·1
1
10
100
t - Current Duration - s
1000
Figure 2. NON-REPETITIVE PEAK ON-STATE CURRENT AGAINST DURATION
APPLICATIONS INFORMATION
gated protectors
This section covers three topics. Firstly, it is explained why gated protectors are needed. Second, the voltage
limiting action of the protector is described. Third, an example application circuit is described.
purpose of gated protectors
Fixed voltage thyristor overvoltage protectors have been used since the early 1980s to protect monolithic
SLICs (Subscriber Line Interface Circuits) against overvoltages on the telephone line caused by lightning, a.c.
power contact and induction. As the SLIC was usually powered from a fixed voltage negative supply rail, the
limiting voltage of the protector could also be a fixed value. The TISP1072F3 is a typical example of a fixed
voltage SLIC protector.
SLICs have become more sophisticated. To minimise power consumption, some designs automatically adjust
the supply voltage, V
BAT
, to a value that is just sufficient to drive the required line current. For short lines the
supply voltage would be set low, but for long lines, a higher supply voltage would be generated to drive
sufficient line current. The optimum protection for this type of SLIC would be given by a protection voltage
which tracks the SLIC supply voltage. This can be achieved by connecting the protection thyristor gate to the
SLIC supply, Figure 3. This gated (programmable) protection arrangement minimises the voltage stress on
the SLIC, no matter what value of supply voltage.
PRODUCT
INFORMATION
5
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