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CY7C291A-30QMB

Description
2K X 8 UVPROM, 25 ns, CDIP24
Categorystorage   
File Size232KB,15 Pages
ManufacturerCypress Semiconductor
Download Datasheet Parametric View All

CY7C291A-30QMB Overview

2K X 8 UVPROM, 25 ns, CDIP24

CY7C291A-30QMB Parametric

Parameter NameAttribute value
Number of functions1
Number of terminals24
Maximum operating temperature125 Cel
Minimum operating temperature-55 Cel
Maximum supply/operating voltage5.5 V
Minimum supply/operating voltage4.5 V
Rated supply voltage5 V
maximum access time25 ns
Processing package description0.300 INCH, WINDOWED, CERDIP-24
stateDISCONTINUED
CraftsmanshipCMOS
packaging shapeRectangle
Package SizeIN-LINE, WINDOW
Terminal formTHROUGH-hole
Terminal spacing2.54 mm
Terminal locationpair
Packaging MaterialsCeramic, Glass-SEALED
Temperature levelMILITARY
memory width8
organize2K × 8
storage density16384 deg
operating modeASYNCHRONOUS
Number of digits2048 words
Number of digits2K
Memory IC typeUVPROM
serial parallelparallel
1CY 7C29 2A
CY7C291A
CY7C292A/CY7C293A
2K x 8 Reprogrammable PROM
Features
Windowed for reprogrammability
CMOS for optimum speed/power
High speed
20 ns (commercial)
25 ns (military)
Low power
identical, but are packaged in 300-mil (7C291A, 7C293A) and
600-mil wide plastic and hermetic DIP packages (7C292A).
The CY7C293A has an automatic power down feature which
reduces the power consumption by over 70% when deselect-
ed. The 300-mil ceramic package may be equipped with an
erasure window; when exposed to UV light the PROM is
erased and can then be reprogrammed. The memory cells uti-
lize proven EPROM floating-gate technology and byte-wide in-
telligent programming algorithms.
The CY7C291A, CY7C292A, and CY7C293A are plug-in re-
placements for bipolar devices and offer the advantages of
lower power, reprogrammability, superior performance and
programming yield. The EPROM cell requires only 12.5V for
the supervoltage and low current requirements allow for gang
programming. The EPROM cells allow for each memory loca-
tion to be tested 100%, as each location is written into, erased,
and repeatedly exercised prior to encapsulation. Each PROM
is also tested for AC performance to guarantee that after cus-
tomer programming the product will meet DC and AC specifi-
cation limits.
A read is accomplished by placing an active LOW signal on
CS
1
, and active HIGH signals on CS
2
and CS
3
. The contents
of the memory location addressed by the address line (A
0
A
10
) will become available on the output lines (O
0
O
7
).
660 mW (commercial and military)
Low standby power
220 mW (commercial and military)
EPROM technology 100% programmable
Slim 300-mil or standard 600-mil packaging available
5V
±10%
V
CC
, commercial and military
TTL-compatible I/O
Direct replacement for bipolar PROMs
Capable of withstanding >2001V static discharge
Functional Description
The CY7C291A, CY7C292A, and CY7C293A are high-perfor-
mance 2K-word by 8-bit CMOS PROMs. They are functionally
Logic Block Diagram
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
O
3
A
8
A
9
A
10
COLUMN
ADDRESS
POWER
DOWN
7C293A
O
2
O
1
ADDRESS
DECODER
O
4
ROW
ADDRESS
PROGRAM-
MABLE
ARRAY
MULTI-
PLEXER
O
6
O
7
Pin Configurations
DIP
Top View
A
7
A
6
O
5
A
5
A
4
A
3
A
2
A
1
A
0
O
0
O
1
O
2
GND
1
24
2
23
3 7C291A 22
4 7C292A 21
7C293A
5
20
6
19
7
18
8
17
9
16
10
15
11
14
12
13
V
CC
A
8
A
9
A
10
CS
1
CS
2
CS
3
O
7
O
6
O
5
O
4
O
3
C291A-3
C291A-2
O
0
4 3 2 1 28 27 26
25
5
24
6
7C291A
23
7
22
8
21
9
7C293A
20
10
19
11
12 1314151617 18
A
10
CS
1
CS
2
CS
3
NC
O
7
O
6
LCC/PLCC (Opaque Only)
Top View
A
4
A
3
A
2
A
1
A
0
NC
O
0
CS
1
CS
2
CS
3
Window available on
7C291A and 7C293A
only.
C291A-1
Cypress Semiconductor Corporation
3901 North First Street
San Jose
CA 95134 •
408-943-2600
March 1986 – Revised May 1993
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