DPX2MA-A10S67S-34-0301-F0 datasheet, PDF

DPX2MA-A10S67S-34-0301-F0: DescriptionRack and Panel Connector, 77 Contact(s), Female-Female, Receptacle; CategoryThe connector The connector; File Size136KB，2 Pages; ManufacturerITT; Websitehttp://www.ittcannon.com/

Download Datasheet Parametric View All

DPX2MA-A10S67S-34-0301-F0 Overview

Rack and Panel Connector, 77 Contact(s), Female-Female, Receptacle

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	ITT
Reach Compliance Code	unknown
Other features	ARINC 404, POLARIZED
Body/casing type	RECEPTACLE
Connector type	RACK AND PANEL CONNECTOR
Contact to complete cooperation	GOLD
Contact completed and terminated	GOLD
Contact point gender	FEMALE-FEMALE
Contact material	COPPER ALLOY
DIN compliance	NO
empty shell	YES
Filter function	NO
IEC compliance	NO
JESD-609 code	e4
MIL compliance	NO
Manufacturer's serial number	DPX
Mixed contacts	YES
Installation type	PANEL
Options	GENERAL PURPOSE
Shell material	ALUMINUM ALLOY
Total number of contacts	77

What DIY tools do you want most?: Are you troubled by lack of tools when doing DIY?[[i]This post was last edited by An_Ran on 2011-12-12 19:59[/i]]...; 安_然 Microcontroller MCU

STM 32 PWM complementary output: I checked the information and found that only TIM1 has PWM complementary output, while other timers do not. Is this true?...; 终极菜鸟 stm32/stm8

Program to implement CAN interface communication of MCP2515 through FPGA: Now I want to connect FPGA with MCP2515 chip to debug CAN interface. Does anyone have relevant program information? Thank you!...; 风色碧空 FPGA/CPLD

Download the ZigBee Evaluation Kit: I am a zigbee beginner and recently purchased Zhou Ligong's zigbee evaluation kit. I would like to share the kit information and hope it will be helpful to everyone....; mervyn RF/Wirelessly

Video display issues: Well, I would like to borrow your popularity to ask for advice. How does the YUV data of the video generated by the decoder display on the LCD? Is there any relevant information? I want to intercept a...; zk12081984 Embedded System

FPGA design counter output jump is not synchronized: I designed a 4-bit counter using FPGA. When simulating, the output pins q0, q1, q2, and q3 cannot change at the same time. This causes a transient state between one state and the next. For example, th...; happyxiaoyaozi FPGA/CPLD

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

Popular Components