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ICS8MH0-187.500AJ

Description
Oscillator
CategoryPassive components    oscillator   
File Size104KB,4 Pages
ManufacturerIDT (Integrated Device Technology)
Environmental Compliance
Download Datasheet Parametric View All

ICS8MH0-187.500AJ Overview

Oscillator

ICS8MH0-187.500AJ Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerIDT (Integrated Device Technology)
Reach Compliance Codecompliant
PRELIMINARY
Integrated
Circuit
Systems, Inc.
ICS8M
X
0
OUT
V
DD
LVCMOS/LVTTL C
LOCK
O
SCILLATOR
ICS8M
X
0
L
OW
J
ITTER
, H
IGH
F
REQUENCY
XTAL O
SCILLATOR
Stable, ultra low jitter, LVCMOS/LVTTL clock generation
For Gigabit Ethernet, Fibre Channel, PCI-Express, other applications
Clock output frequencies from 75MHz to 250MHz
One single-ended LVCMOS/LVTTL clock output
Output Enable (OE) pin (high impedance – when low)
Small 4-pin 5mm x 7mm x 1.5mm SMT ceramic package
Low profile package allows back-side PCB mounting
Pb-free RoHS compliant (by default; no additional code required)
3.3V or 2.5V device power supply options
Commercial (0 to +70
O
C) and Industrial (-40 to +85
O
C) temperatures
Frequency stability of ±50ppm or ±100ppm
(including initial accuracy, operating temperature variation, supply voltage
variation, load variation, reflow drift, and aging for 10 years)
4
8Mx0
(Top View)
1
• Low phase jitter < 1 ps rms maximum (12kHz to 20MHz)
4-pin CERHERMETIC 5mm x 7mm x 1.5mm SMT
E
LECTRICAL
S
PECIFICATIONS
Unless stated otherwise, V
DD
= 3.3V ± 0.3V or 2.5V ± 5%, T
A
= 0°C to +70°C (commercial), T
A
= -40°C to +85°C (industrial)
Specifications
Item
DC Characteristics
Power Supply
(V
DD
, GND pins) Power Supply Voltage
Power Supply Current
Current w/Output Disabled
Input Capacitance
Output Enable
(OE pin)
LVCMOS/LVTTL
Input High Voltage
Input Low Voltage
Input High Current
Input Low Current
Internal Pullup Resistor
Clock Output
Level (OUT pin)
LVCMOS/LVTTL
Output High Voltage
Output Low Voltage
1
1
Symbol
Min.
3.0
2.375
Typ.
3.3
2.5
75
4
Max.
3.6
2.625
<0.6
Units
V
V
mA
mA
pF
V
Test Conditions
3.3V operation
2.5V operation (8MJ0 and 8MK0 only)
OE = V
DD
OE = GND
V
DD
I
DD
I
OED
C
IN
V
IH
V
IL
I
IH
I
IL
R
PULLUP
V
OH
V
OL
C
L
R
OUT
0.7 * V
DD
0.3 * V
DD
5
-150
51
V
DD
- 0.4
0.4
25
20
75
250
±100
±50
50
1.5
1.5
10
<1
0.2
3
3
25
V
µA
µA
V
V
pF
Ω
MHz
ppm p-p
ppm p-p
%
ns
ns
ms
ps r m s
ps
ps
ps
ps
All conditions
8MH0 & 8MK0 Includes frequency set, V
DD
, T
A
and
8MG0 & 8MJ0 load variation, reflow drift, 10 yr. aging
V
TH
= V
DD
/ 2, C
L
Max. pF
20% to 80% of V
DD
C
L
Max. pF
Time at Min. V
DD
(3.0V or 2.375V) to be 0s
design target
Deterministic
Random,
σ
of random jitter
Root Mean Square,
σ
of total jitter distribution
Peak-to-Peak
f
O
250MHz
V
DD
= 3.3V±0.3V or 2.5V±5%
V
DD
= V
IN
= 3.6V or 2.625V
V
DD
= 3.6V or 2.625V, V
IN
= 0V
Output Load Condition
Output Impedance
AC Characteristics
Output
Output Frequency Range
(OUT pin)
Frequency Stability Error
Output Duty Cycle
Output Rise Time
Output Fall Time
Oscillator Star t-up Time
RMS Phase Jitter, Random
2
Jitter
Δ
f/f
O
odc
t
R
t
F
t
OSC
t
jit (Ø)
t
DS3
t
RS
3
t
RMS3
t
P-P
t
acc
3
3
4
ps
Accumulated Jitter, n = 2 to 50,000 cycles
NOTE 1: Outputs terminated with 50
Ω
to V
DD
/2. See Parameter Measurement Information,
Output Load AC Test Circuit Diagrams.
NOTE 2: Measured using an Aeroflex PN9500 with a 12kHz to 20MHz integration range.
NOTE 3: Measured using a Wavecrest SIA-3000.
Supply Voltage & Frequency Accuracy
G=
H=
J=
K=
8Mx0AJ
3.3V / 3.3V
3.3V / 3.3V
2.5V / 3.3V
2.5V / 3.3V
±50 ppm
±100 ppm
±50 ppm
±100 ppm
The Preliminary Information presented herein represents a product in prototyping or pre-production. The
noted characteristics are based on initial product characterization. Integrated Circuit Systems, Incorpo-
rated (ICS) reserves the right to change any circuitry or specifications without notice.
www.icst.com/products/hiperclocks.html
1
GND
REV. C NOVEMBER 18, 2005
OE
2
3
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