November 2008
IMSH1G[U/E]03A1F1C(T)
IMSH2G[U/E]13A1F1C(T)
240-Pin DDR3 Unbuffered Memory Modules
1-GByte and 2-GByte
EU RoHS compliant
Advance
Internet Data Sheet
Rev. 0.64
Advance Internet Data Sheet
IMSH[1G/2G][U/E]x3A1F1C(T)
DDR3 Unbuffered DIMM
IMSH1G[U/E]03A1F1C(T), IMSH2G[U/E]13A1F1C(T)
Revision History: 2008-11, Rev. 0.64
Page
All
21 - 41
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19 - 34
All
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Subjects (major changes since last revision)
Product types IMSH[1/2]GU[0/1]3A1F1C(T)-[08D/08E/16J] removed and adapted to internet edition.
Updated SPD codes.
Added product type IMSH[1/2]GU[0/1]3A1F1C-16J.
Updated SPD codes.
Editorial change.
Added 1GB and 2GB ECC-Unbuffered DIMM with Thermal Sensor Product Types and related information.
Added 1GB and 2GB ECC-Unbuffered DIMM with Thermal Sensor Product Types and related information.
Data sheet for 1GByte and 2GByte Unbuffered DIMM Product Family.
Previous Revision: Rev. 0.63, 2008-08
Previous Revision: Rev. 0.62, 2008-06
Previous Revision: Rev. 0.61, 2008-05
Previous Revision: Rev. 0.60, 2008-04
Previous Revision: Rev. 0.51, 2008-03
Previous Revision: Rev. 0.51, 2008-03
Previous Revision: Rev. 0.5, 2007-12
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qag_techdoc_A4, 4.20, 2008-01-25
03052008-R2G5-2FN2
2
Advance Internet Data Sheet
IMSH[1G/2G][U/E]x3A1F1C(T)
DDR3 Unbuffered DIMM
1
Overview
This chapter gives an overview of the 240–pin Unbuffered DDR3 Dual-In-Line memory modules product family and describes
its main characteristics.
1.1
Features
• Programmable CAS Latency, CAS Write Latency, Additive
Latency, Burst Length and Burst Type.
• On-Die-Termination (ODT) and Dynamic ODT for
improved signal integrity.
• Refresh, Self Refresh and Power Down Modes.
• ZQ Calibration for output driver and ODT.
• System Level Timing Calibration Support via Write
Leveling and Multi Purpose Register (MPR) Read Pattern.
• Serial Presence Detect with EEPROM.
• Thermal sensor functionality supported.
• UDIMM dimensions: 133.35 mm x 30 mm.
• Based on standard reference raw cards: 'A', 'B', 'D', and 'E'.
• RoHS compliant products1).
• 240-pin 8-Byte DDR3 SDRAM unbuffered dual-in-line
memory modules.
• Module organization: 128M
×
64, 256M
×
64, 128M
×
72,
256M
×
72
Chip organization: 128M
×
8
• PC3-12800, PC3-10600, PC3-8500 and PC3-6400
module speed grades.
• 2-GB, 1-GB modules built with 1-Gbit DDR3 SDRAMs in
packages PG-TFBGA-78.
• DDR3 SDRAMs with a single 1.5 V (± 0.075 V) power
supply.
• Asynchronous Reset.
TABLE 1
Performance Table for DDR3–1333 and DDR3–1066
QAG Speed Code
Module Speed Bin
Device Speed Bin
CL-
n
RCD
-
n
RP
CL and CWL settings for maximum
clock frequency
Maximum Clock Frequency
and Data Rate
with above CL and CWL settings
Minimum Clock Frequency
and Data Rate
with above CL and CWL settings
PC3
DDR3
–13G
–10600G
–1333G
8-8-8
CL = 8
CWL = 7
667
1333
533
1066
–13H
–10600H
–1333H
9-9-9
CL = 9
CWL = 7
667
1333
533
1066
–10F
–8500F
–1066F
7-7-7
CL = 7
CWL = 6
533
1066
400
800
–10G
–8500G
–1066G
8-8-8
CL = 8
CWL = 6
533
1066
400
800
MHz
MHz
Mb/s
MHz
Mb/s
Unit
Note
2)
1) RoHS Compliant Product: Restriction of the use of certain hazardous substances (RoHS) in electrical and electronic equipment as defined
in the directive 2002/95/EC issued by the European Parliament and of the Council of 27 January 2003. These substances include mercury,
lead, cadmium, hexavalent chromium, polybrominated biphenyls and polybrominated biphenyl ethers. For more information please visit
www.qimonda.com/green_products.
2) The available CL and CWL settings depend on the SDRAM device speed bin. The CL setting and CWL setting result in maximum but also
minimum clock frequency requirements. When making a selection of operating clock frequency, both need to be fulfilled: Requirements
from CL setting as well as requirements from CWL setting. For details, refer to
Chapter 4.1
Speed Bins.
Rev. 0.64, 2008-11
03052008-R2G5-2FN2
3
Advance Internet Data Sheet
IMSH[1G/2G][U/E]x3A1F1C(T)
DDR3 Unbuffered DIMM
1.2
Description
The memory array is designed with 1Gb Double-Data-Rate-
Three (DDR3) Synchronous DRAMs.
De-coupling
capacitors, stub resistors, calibration resistors and
termination resistors are mounted on the PCB. The DIMMs
feature serial presence detect based on a 256 byte serial
EEPROM device using the 2-pin I
2
C protocol. The first
176 bytes are programmed with module specific SPD data.
Qimonda IMSH[1G/2G][U/E]x3A1F1C(T) are Unbuffered
DIMM family with 30 mm height based on DDR3 SDRAM
technology. DIMMs are available non-ECC modules in
128M
×
64 (1-GB), 256M
×
64 (2-GB), and as ECC modules
in 128M
×
72 (1-GB), 256M
×
72 (2-GB) organization and
density, intended for mounting into 240-pin connector
sockets.
TABLE 2
Ordering Information Table for Modules without Thermal Sensor
QAG Product Type
Compliance Code
Description
1-GByte Non-ECC Unbuffered DIMM IMSH1GU03A1F1C
IMSH1GU03A1F1C-10F 1GB 1R×8 PC3–8500U–7–10–A0
IMSH1GU03A1F1C-10G 1GB 1R×8 PC3–8500U–8–10–A0
IMSH1GU03A1F1C-13G 1GB 1R×8 PC3–10600U–8–10–A0
IMSH1GU03A1F1C-13H 1GB 1R×8 PC3–10600U–9–10–A0
240-pin 1-GByte DDR3 Unbuffered DIMM with one rank for
non-ECC applications. Each memory rank consists of eight
DDR3 components in x8 organization. Standard reference
card A is used on this assembly
Used DDR3 SDRAM Component
Product Type: IDSH1G-03A1F1C
Density: 1-Gbit
Organization: 128-Mbit × 8
Address Bits (Row/Column/Bank): 14/10/3
240-pin 2-GByte DDR3 Unbuffered DIMM with two ranks
for non-ECC applications. Each memory rank consists of
eight DDR3 components in x8 organization. Standard
reference card B is used on this assembly
Used DDR3 SDRAM Component
Product Type: IDSH1G-03A1F1C
Density: 1-Gbit
Organization: 128-Mbit × 8
Address Bits (Row/Column/Bank): 14/10/3
2-GByte Non-ECC Unbuffered DIMM IMSH2GU13A1F1C
IMSH2GU13A1F1C-10F 2GB 2R×8 PC3–8500U–7–10–B0
IMSH2GU13A1F1C-10G 2GB 2R×8 PC3–8500U–8–10–B0
IMSH2GU13A1F1C-13G 2GB 2R×8 PC3–10600U–8–10–B0
IMSH2GU13A1F1C-13H 2GB 2R×8 PC3–10600U–9–10–B0
Rev. 0.64, 2008-11
03052008-R2G5-2FN2
4
Advance Internet Data Sheet
IMSH[1G/2G][U/E]x3A1F1C(T)
DDR3 Unbuffered DIMM
TABLE 3
Ordering Information Table for Modules with Thermal Sensor
QAG Product Type
Compliance Code
Description
1-GByte ECC Unbuffered DIMM IMSH1GE03A1F1CT
IMSH1GE03A1F1CT10F
IMSH1GE03A1F1CT10G
IMSH1GE03A1F1CT13G
IMSH1GE03A1F1CT13H
1G 1R×8 PC3–8500E–7–10–D0
1G 1R×8 PC3–8500E–8–10–D0
1G 1R×8 PC3–10600E–8–10–D0
1G 1R×8 PC3–10600E–9–10–D0
240-pin 1-GByte DDR3 Unbuffered DIMM with one rank
and On-DIMM Thermal Sensor for ECC applications. Each
memory rank consists of nine DDR3 components in x8
organization. Standard reference card D is used on this
assembly
Used DDR3 SDRAM Component
Product Type: IDSH1G-03A1F1C
Density: 1-Gbit
Organization: 128-Mbit × 8
Address Bits (Row/Column/Bank): 14/10/3
2-GByte ECC Unbuffered DIMM IMSH2GE13A1F1CT
IMSH2GE13A1F1CT10F
IMSH2GE13A1F1CT10G
IMSH2GE13A1F1CT13G
IMSH2GE13A1F1CT13H
2GB 2R×8 PC3–8500E–7–10–E0
240-pin 2-GByte DDR3 Unbuffered DIMM with two ranks
2GB 2R×8 PC3–8500E–8–10–E0 and On-DIMM Thermal Sensor for ECC applications. Each
memory rank consists of nine DDR3 components in x8
2GB 2R×8 PC3–10600E–8–10–E0
organization. Standard reference card E is used on this
2GB 2R×8 PC3–10600E–9–10–E0 assembly
Used DDR3 SDRAM Component
Product Type: IDSH1G-03A1F1C
Density: 1-Gbit
Organization: 128-Mbit × 8
Address Bits (Row/Column/Bank): 14/10/3
Rev. 0.64, 2008-11
03052008-R2G5-2FN2
5
Embedded System
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