MBM29PL32TM/BM
90/10
Data Sheet
(Retired Product)
MBM29PL32TM/BM
90/10
Cover Sheet
This product has been retired and is not recommended for new designs. Availability of this document is retained for reference
and historical purposes only.
Continuity of Specifications
There is no change to this data sheet as a result of offering the device as a Spansion product. Any changes that have been
made are the result of normal data sheet improvement and are noted in the document revision summary.
For More Information
Please contact your local sales office for additional information about Spansion memory solutions.
Publication Number
MBM29PL32TM/BM
Revision
DS05-20907-4E
Issue Date
July 31, 2007
SPANSION
Data Sheet
TM
Flash Memory
September 2003
TM
This document specifies SPANSION memory products that are now offered by both Advanced Micro Devices and
Fujitsu. Although the document is marked with the name of the company that originally developed the specification,
these products will be offered to customers of both AMD and Fujitsu.
Continuity of Specifications
There is no change to this datasheet as a result of offering the device as a SPANSION
TM
product. Future routine
revisions will occur when appropriate, and changes will be noted in a revision summary.
Continuity of Ordering Part Numbers
AMD and Fujitsu continue to support existing part numbers beginning with "Am" and "MBM". To order these
products, please use only the Ordering Part Numbers listed in this document.
For More Information
Please contact your local AMD or Fujitsu sales office for additional information about SPANSION
solutions.
TM
memory
FUJITSU SEMICONDUCTOR
DATA SHEET
DS05-20907-4E
FLASH MEMORY
CMOS
32 M (4M
×
8/2M
×
16) BIT
MirrorFlash
TM
*
MBM29PL32TM/BM
90/10
■
DESCRIPTION
The MBM29PL32TM/BM is a 32M-bit, 3.0 V-only Flash memory organized as 4M bytes by 8 bits or 2M words by
16 bits. The MBM29PL32TM/BM is offered in 48-pin TSOP(1) and 48-ball FBGA. The device is designed to be
programmed in-system with the standard 3.0 V V
CC
supply. 12.0 V V
PP
and 5.0 V V
CC
are not required for write or
erase operations. The devices can also be reprogrammed in standard EPROM programmers.
(Continued)
MBM29PL32TM/BM
90
3.0 V to 3.6 V
90 ns
90 ns
25 ns
10
3.0 V to 3.6 V
100 ns
100 ns
30 ns
■
PRODUCT LINE UP
Part No.
V
CC
Max Address Access Time
Max CE Access Time
Max Page Read Access Time
■
PACKAGES
48-pin plastic TSOP (1)
48-ball plastic FBGA
(FPT-48P-M19)
* :
MirrorFlash
TM
is a trademark of Fujitsu Limited.
(BGA-48P-M20)
Note
s
:
•
Programming in byte mode
(
×
8
) is prohibited.
•
Programming to the address that already contains data is prohibited
.
(It is mandatory to erase data prior to overprogram on the same address.)
Retired Product DS05-20907-4E_July 31, 2007
MBM29PL32TM/BM
90/10
(Continued)
The standard MBM29PL32TM/BM offers access times of 90 ns, allowing operation of high-speed microproces-
sors without wait states. To eliminate bus contention the devices have separate chip enable (CE), write enable
(WE), and output enable (OE) controls.
The MBM29PL32TM/BM supports command set compatible with JEDEC single-power-supply EEPROMS stan-
dard. Commands are written into the command register. The register contents serve as input to an internal state-
machine which controls the erase and programming circuitry. Write cycles also internally latch addresses and
data needed for the programming and erase operations. Reading data out of the devices is similar to reading
from 5.0 V and 12.0 V Flash or EPROM devices.
The MBM29PL32TM/BM is programmed by executing the program command sequence. This will invoke the
Embedded Program Algorithm
TM
which is an internal algorithm that automatically times the program pulse widths
and verifies proper cell margin. Erase is accomplished by executing the erase command sequence. This will
invoke the Embedded Erase Algorithm
TM
which is an internal algorithm that automatically preprograms the array
if it is not already programmed before executing the erase operation. During erase, the device automatically
times the erase pulse widths and verifies proper cell margin.
The device also features a sector erase architecture. The sector mode allows each sector to be erased and
reprogrammed without affecting other sectors. All sectors are erased when shipped from the factory.
The device features single 3.0 V power supply operation for both read and write functions. Internally generated
and regulated voltages are provided for the program and erase operations. A low V
CC
detector automatically
inhibits write operations on the loss of power. The end of program or erase is detected by Data Polling of DQ
7
,
by the Toggle Bit feature on DQ
6
. Once the end of a program or erase cycle has been completed, the devices
internally return to the read mode.
Fujitsu Flash technology combines years of Flash memory manufacturing experience to produce the highest
levels of quality, reliability, and cost effectiveness. The devices electrically erase all bits within a sector simulta-
neously via hot-hole assisted erase. The words are programmed one word at a time using the EPROM program-
ming mechanism of hot electron injection.
Retired Product DS05-20907-4E_July 31, 2007
5
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