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IDT101514S10Y

Description
Standard SRAM, 256KX4, 10ns, BICMOS, PDSO32, 0.400 INCH, PLASTIC, SOJ-32
Categorystorage    storage   
File Size97KB,7 Pages
ManufacturerIDT (Integrated Device Technology)
Download Datasheet Parametric View All

IDT101514S10Y Overview

Standard SRAM, 256KX4, 10ns, BICMOS, PDSO32, 0.400 INCH, PLASTIC, SOJ-32

IDT101514S10Y Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerIDT (Integrated Device Technology)
Parts packaging codeSOJ
package instruction0.400 INCH, PLASTIC, SOJ-32
Contacts32
Reach Compliance Codenot_compliant
ECCN code3A991.B.2.B
Maximum access time10 ns
I/O typeSEPARATE
JESD-30 codeR-PDSO-J32
JESD-609 codee0
length20.955 mm
memory density1048576 bit
Memory IC TypeSTANDARD SRAM
memory width4
Humidity sensitivity level3
Negative supply voltage rating-5.2 V
Number of functions1
Number of terminals32
word count262144 words
character code256000
Operating modeASYNCHRONOUS
Maximum operating temperature75 °C
Minimum operating temperature
organize256KX4
Output characteristicsOPEN-EMITTER
Package body materialPLASTIC/EPOXY
encapsulated codeSOJ
Encapsulate equivalent codeSOJ32,.44
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Parallel/SerialPARALLEL
power supply-5.2 V
Certification statusNot Qualified
Maximum seat height3.683 mm
Maximum slew rate0.26 mA
surface mountYES
technologyBICMOS
Temperature levelCOMMERCIAL EXTENDED
Terminal surfaceTin/Lead (Sn85Pb15)
Terminal formJ BEND
Terminal pitch1.27 mm
Terminal locationDUAL
width10.16 mm
®
HIGH-SPEED BiCMOS
ECL STATIC RAM
1M (256K x 4-BIT) SRAM
Integrated Device Technology, Inc.
PRELIMINARY
IDT10514
IDT100514
IDT101514
FEATURES:
• 262,144-words x 4-bit organization
• Address access time: 10/12/15 ns
• Low power dissipation: 800mW (typ.)
• Guaranteed Output Hold time
• Fully compatible with ECL logic levels
• Separate data input and output
• Standard through-hole and surface mount packages
• Guaranteed-performance die available for MCMs/hybrids
DESCRIPTION:
The IDT10514, IDT100514 and IDT101514 are 1,048,576-
bit high-speed BiCMOS ECL Static Random Access Memo-
ries organized as 256Kx4, with separate data inputs and
outputs. All I/Os are fully compatible with ECL levels.
These devices are part of a family of asynchronous four-
bit-wide ECL SRAMs. The devices have been configured to
follow the standard ECL SRAM JEDEC pinout. Because they
are manufactured in BiCMOS technology, power dissipation
is greatly reduced over equivalent bipolar devices. Low power
operation provides higher system reliability and makes pos-
sible the use of the plastic SOJ package for high-density
surface mount assembly.
The fast access time and guaranteed Output Hold time
allow greater margin for system timing variation. DataIN setup
time specified with respect to the trailing edge of Write Pulse
eases write timing allowing balanced Read and Write cycle
times.
FUNCTIONAL BLOCK DIAGRAM
A
0
16,384-BIT
MEMORY ARRAY
V
CC
V
EE
DECODER
A
11
D
0
D
1
D
2
D
3
SENSE AMPS
AND READ/WRITE
CONTROL
Q
0
Q
1
Q
2
Q
3
WE
1
WE
2
CS
2811 drw 01
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
COMMERCIAL TEMPERATURE RANGE
©1992
Integrated Device Technology, Inc.
AUGUST 1992
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