EEWORLDEEWORLDEEWORLD

Part Number

Search

531BC13M0000DG

Description
LVDS Output Clock Oscillator, 13MHz Nom, ROHS COMPLIANT, SMD, 6 PIN
CategoryPassive components    oscillator   
File Size215KB,12 Pages
ManufacturerSilicon Laboratories Inc
Environmental Compliance
Download Datasheet Parametric View All

531BC13M0000DG Overview

LVDS Output Clock Oscillator, 13MHz Nom, ROHS COMPLIANT, SMD, 6 PIN

531BC13M0000DG Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerSilicon Laboratories Inc
Reach Compliance Codeunknown
Other featuresTRAY
maximum descent time0.35 ns
Frequency Adjustment - MechanicalNO
frequency stability7%
JESD-609 codee4
Manufacturer's serial number531
Installation featuresSURFACE MOUNT
Nominal operating frequency13 MHz
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Oscillator typeLVDS
physical size7.0mm x 5.0mm x 1.85mm
longest rise time0.35 ns
Maximum supply voltage3.63 V
Minimum supply voltage2.97 V
Nominal supply voltage3.3 V
surface mountYES
maximum symmetry55/45 %
Terminal surfaceNickel/Gold (Ni/Au)
S i 5 3 0 / 5 31
R
EVISION
D
C
R Y S TA L
O
S C I L L A T O R
(XO)
(10 M H
Z T O
1.4 G H
Z
)
Features
Available with any-rate output
frequencies from 10 MHz to 945 MHz
and select frequencies to 1.4 GHz
3rd generation DSPLL
®
with superior
jitter performance
3x better frequency stability than
SAW-based oscillators
Internal fixed crystal frequency
ensures high reliability and low
aging
Available CMOS, LVPECL,
LVDS, and CML outputs
3.3, 2.5, and 1.8 V supply options
Industry-standard 5 x 7 mm
package and pinout
Pb-free/RoHS-compliant
Si5602
Ordering Information:
See page 7.
Applications
SONET/SDH
Networking
SD/HD video
Test and measurement
Clock and data recovery
FPGA/ASIC clock generation
Pin Assignments:
See page 6.
(Top View)
NC
OE
GND
1
2
3
6
5
4
V
DD
Description
The Si530/531 XO utilizes Silicon Laboratories’ advanced DSPLL circuitry
to provide a low jitter clock at high frequencies. The Si530/531 is available
with any-rate output frequency from 10 to 945 MHz and select frequencies to
1400 MHz. Unlike a traditional XO, where a different crystal is required for
each output frequency, the Si530/531 uses one fixed crystal to provide a
wide range of output frequencies. This IC based approach allows the crystal
resonator to provide exceptional frequency stability and reliability. In addition,
DSPLL clock synthesis provides superior supply noise rejection, simplifying
the task of generating low jitter clocks in noisy environments typically found in
communication systems. The Si530/531 IC based XO is factory configurable
for a wide variety of user specifications including frequency, supply voltage,
output format, and temperature stability. Specific configurations are factory
programmed at time of shipment, thereby eliminating long lead times
associated with custom oscillators.
®
CLK–
CLK+
Si530 (LVDS/LVPECL/CML)
OE
NC
GND
1
2
3
6
5
4
V
DD
Functional Block Diagram
V
DD
CLK– CLK+
NC
CLK
Si530 (CMOS)
Fixed
Frequency
XO
Any-rate
10–1400 MHz
DSPLL
®
Clock
Synthesis
OE
NC
GND
1
2
3
6
5
4
V
DD
CLK–
CLK+
Si531 (LVDS/LVPECL/CML)
OE
GND
Rev. 1.1 6/07
Copyright © 2007 by Silicon Laboratories
Si530/531
Changes in Linux 2.6 interrupt registration
irqreturn_t int_interrupt(int irq,void * dev_id,struct pt_regs *regs); register interrupt function extern int __must_check request_irq(unsigned int, irq_handler_t handler,unsigned long, const char *, ...
ren364940161 Linux and Android
【National Technology N32G430】05 The page is initially displayed, system composition
05 The page is initially displayed, system composition In order to ensure that the tests are carried out in an orderly manner and displayed effectively, the page display is prepared before the test, s...
秦天qintian0303 Domestic Chip Exchange
What is the model of MARKING's power chip for GKN? Package SOT23-6
As shown in the figure...
liunixy Power technology
Winbond
What kind of chip is Winbond w78e52b-24? Is its programming the same as that of 51 microcontroller? Are the two compatible?...
妖刀村正 Embedded System
Original by Xiaoyao --- Criticizing the three harmful effects of 3G network monitoring. [Very accurate]
(Completely original,) Huang Po wants to brag about her own melons, but today I will criticize our own "melons". 3G network monitoring has many advantages. It can solve many problems that ordinary net...
xyh_521 Industrial Control Electronics
Introduction to RF5 Architecture
RF5是德州仪器TI公司DSP软件开发的起步代码参考框架,它以DSP/BIOS为基础,利用其中的数据处理元素和数据通信元素方便快捷地完成DSP软件的设计与开发。RF5是RF的最新版本,其区别于RF1和RF3的显著特点是其支持动态对象创建和支持线程(任务)挂起功能,因此适合系统较复杂的应用场合。 RF5 mainly implements three functions, storage manag...
灞波儿奔 DSP and ARM Processors

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 2202  1116  2648  242  695  45  23  54  5  14 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号