Ordering number : ENA1835A
LC87F1L16A
CMOS IC
16K-byte FROM and 2048-byte RAM integrated
8-bit 1-chip Microcontroller
with USB-host controller
Overview
http://onsemi.com
The LC87F1L16A is an 8-bit microcomputer that, integrates on a single chip a number of hardware features such as
16K-byte flash ROM, 2048-byte RAM, an on-chip debugger, a 16-bit timer/counter, a 16-bit timer, four 8-bit timers,
a base timer serving as a time-of-day clock, a synchronous SIO interface with automatic data transfer capabilities, an
asynchronous/synchronous SIO interface, a UART interface, 2 channels of full-speed USB interface (host control
function), a 12-channel AD converter, 2 channels of 12-bit PWM, a system clock frequency divider, and an interrupt
feature.
Features
Flash
ROM
•
16384
×
8 bits
•
Capable of on-board programming
with a wide range of supply voltages: 3.0 to 5.5V
•
Block-erasable in 128 byte units
•
Writes data in 2-byte units
RAM
•
2048
×
9 bits
Package Dimensions
unit : mm (typ)
3163B
9.0
7.0
36
37
25
24
48
13
1
0.5
12
0.18
0.15
Package
Form
•
SQFP48 (7×7): Lead-/Halogen-free type
(0.75)
1.7max
0.1
(1.5)
SANYO : SQFP48(7X7)
* This product is licensed from Silicon Storage Technology, Inc. (USA).
Semiconductor Components Industries, LLC, 2013
May, 2013
Ver.1.01
D2612HK/11211HKIM 20100907-S00002 No.A1835-1/23
7.0
9.0
0.5
LC87F1L16A
Bus
Cycle Time
•
83.3ns (When CF=12MHz)
Note: The bus cycle time here refers to the ROM read speed.
Minimum
Instruction Cycle Time (tCYC)
•
250ns (When CF=12MHz)
Ports
•
I/O ports
Ports whose I/O direction can be designated in 1-bit units 26 (P10 to P17, P20 to P25, P30 to P34,
P70 to P73, PWM0, PWM1, XT2)
Ports whose I/O direction can be designated in 4-bit units 8 (P00 to P07)
•
USB ports
2 (UHAD+, UHAD-, UHBD+, UHBD-)
•
Dedicated oscillator ports
2 (CF1, CF2)
•
Input-only port (also used for oscillation)
1 (XT1)
•
Reset pins
1 (RES)
•
Power supply pins
6 (VSS1 to 3, VDD1 to 3)
Timers
•
Timer 0: 16-bit timer/counter with 2 capture registers.
Mode 0: 8-bit timer with an 8-bit programmable prescaler (with two 8-bit capture registers)
×
2 channels
Mode 1: 8-bit timer with an 8-bit programmable prescaler (with two 8-bit capture registers)
+ 8-bit counter (with two 8-bit capture registers)
Mode 2: 16-bit timer with an 8-bit programmable prescaler (with two 16-bit capture registers)
Mode 3: 16-bit counter (with two 16-bit capture registers)
•
Timer 1: 16-bit timer/counter that supports PWM/toggle outputs
Mode 0: 8-bit timer with an 8-bit prescaler (with toggle outputs) + 8-bit timer/
counter with an 8-bit prescaler (with toggle outputs)
Mode 1: 8-bit PWM with an 8-bit prescaler
×
2 channels
Mode 2: 16-bit timer/counter with an 8-bit prescaler (with toggle outputs)
(toggle outputs also possible from lower-order 8 bits)
Mode 3: 16-bit timer with an 8-bit prescaler (with toggle outputs)
(lower-order 8 bits may be used as a PWM output)
•
Timer 4: 8-bit timer with a 6-bit prescaler
•
Timer 5: 8-bit timer with a 6-bit prescaler
•
Timer 6: 8-bit timer with a 6-bit prescaler (with toggle outputs)
•
Timer 7: 8-bit timer with a 6-bit prescaler (with toggle outputs)
•
Base timer
1) The clock is selectable from the subclock (32.768kHz crystal oscillation), system clock, and timer 0 prescaler
output.
2) Interrupts programmable in 5 different time schemes
SIO
•
SIO0: Synchronous serial interface
1) LSB first/MSB first mode selectable
2) Transfer clock cycle: 4/3 to 512/3 tCYC
3) Automatic continuous data transmission (1 to 256 bits, specifiable in 1-bit units)
(Suspension and resumption of data transmission possible in 1 byte units)
•
SIO1: 8-bit asynchronous/synchronous serial interface
Mode 0: Synchronous 8-bit serial I/O (2- or 3-wire configuration, 2 to 512 tCYC transfer clocks)
Mode 1: Asynchronous serial I/O (half-duplex, 8 data bits, 1 stop bit, 8 to 2048 tCYC baudrates)
Mode 2: Bus mode 1 (start bit, 8 data bits, 2 to 512 tCYC transfer clocks)
Mode 3: Bus mode 2 (start detect, 8 data bits, stop detect)
Full
Duplex UART
1) Data length: 7/8/9 bits selectable
2) Stop bits: 1 bit (2 bits in continuous transmission mode)
3) Baud rate: 16/3 to 8192/3 tCYC
No.A1835-2/23
LC87F1L16A
AD
Converter: 12 bits
×
12 channels
PWM:
Multifrequency 12-bit PWM
×
2 channels
USB
Interface (host control function)
×
2 channels
1) Compliant with full-speed (12M bps) specifications
2) Supports 4 transfer types (control transfer, bulk transfer, interrupt transfer, and isochronous transfer).
Watchdog
Timer
•
Watchdog timer using external RC circuitry
•
Interrupt and reset signals selectable
Clock
Output Function
1) Can output a clock with a clock rate of 1/1, 1/2, 1/4, 1/8, 1/16, 1/32, or 1/64 of the source oscillator clock selected
as the system clock.
2) Can output the source oscillation clock for the subclock.
Interrupts
•
39 sources, 10 vector addresses
1) Provides three levels (low (L), high (H), and highest (X)) of multiplex interrupt control. Any interrupt requests of
the level equal to or lower than the current interrupt are not accepted.
2) When interrupt requests to two or more vector addresses occur at the same time, the interrupt of the highest level
takes precedence over the other interrupts. For interrupts of the same level, the interrupt into the smallest vector
address takes precedence.
No.
1
2
3
4
5
6
7
8
9
10
Vector Address
00003H
0000BH
00013H
0001BH
00023H
0002BH
00033H
0003BH
00043H
0004BH
Level
X or L
X or L
H or L
H or L
H or L
H or L
H or L
H or L
H or L
H or L
INT0
INT1
INT2/T0L/INT4/UHC-A bus active/UHC-B bus active
INT3/INT5/Base timer
T0H/INT6/UHC-A device connected/UHC-A disconnected/UHC-A resume
T1L/T1H/INT7/UHC-B device connected/UHC-B disconnected/UHC-B resume
SIO0/UART1 receive complete
SIO1/UART1 buffer empty/UART1 transmit complete
ADC/T6/T7/UHC-ACK/UHC-NAK/UHC error/UHC STALL
Port 0/PWM0/PWM1/T4/T5/UHC-SOF
Interrupt Source
•
Priority levels X > H > L
•
Of interrupts of the same level, the one with the smallest vector address takes precedence.
Subroutine
Stack Levels: 1024 levels maximum (The stack is allocated in RAM.)
High-speed
Multiplication/Division Instructions
•
16 bits
×
8 bits
(5 tCYC execution time)
•
24 bits
×
16 bits
(12 tCYC execution time)
•
16 bits
÷
8 bits
(8 tCYC execution time)
•
24 bits
÷
16 bits
(12 tCYC execution time)
Oscillation
and PLL Circuits
•
RC oscillation circuit (internal):
•
CF oscillation circuit:
•
Crystal oscillation circuit:
•
PLL circuit (internal):
For system clock
For system clock
For system clock, time-of-day clock
For USB interface (see Fig.5)
No.A1835-3/23
LC87F1L16A
Standby
Function
•
HALT mode: Halts instruction execution while allowing the peripheral circuits to continue operation.
1) Oscillation is not halted automatically.
2) There are three ways of resetting the HOLD mode.
(1) Setting the reset pin to the lower level
(2) System resetting by watchdog timer
(3) Occurrence of an interrupt
•
HOLD mode: Suspends instruction execution and the operation of the peripheral circuits.
1) The PLL base clock generator, CF, RC and crystal oscillators automatically stop operation.
2) There are five ways of resetting the HOLD mode.
(1) Setting the reset pin to the lower level
(2) System resetting by watchdog timer
(3) Having an interrupt source established at either INT0, INT1, INT2, INT4 or INT5
* INT0 and INT1 HOLD mode reset is available only when level detection is set.
(4) Having an interrupt source established at port 0
(5) Having an bus active interrupt source established in the USB host controll circuit
•
X'tal HOLD mode: Suspends instruction execution and the operation of the peripheral circuits except the base timer.
1) The PLL base clock generator, CF and RC oscillator automatically stop operation.
2) The state of crystal oscillation established when the X'tal HOLD mode is entered is retained.
3) There are six ways of resetting the X'tal HOLD mode.
(1) Setting the reset pin to the low level
(2) System resetting by watchdog timer
(3) Having an interrupt source established at either INT0, INT1, INT2, INT4 or INT5
* INT0 and INT1 HOLD mode reset is available only when level detection is set.
(4) Having an interrupt source established at port 0
(5) Having an interrupt source established in the base timer circuit
(6) Having an bus active interrupt source established in the USB host controll circuit
Development
Tools
•
On-chip debugger: TCB87 type-B + LC87F1L16A or TCB87 type-C (three wire cable) + LC87F1L16A
Flash
ROM Programming Boards
Package
SQFP48(7
×
7)
Programming Boards
W87F55256SQ
Flash
Programmer
Maker
Flash Support Group, Inc.
(FSG)
Flash Support Group, Inc.
(FSG)
+
Sanyo (Note 1)
Single
Programmer
Onboard
Single/Gang
Programmer
Single/Gang
Programmer
Sanyo
Onboard
Single/Gang
Programmer
Model
AF9709/AF9709B/AF9709C
(Including Ando Electric Co., Ltd. models)
AF9101/AF9103 (Main unit)
(FSG models)
SIB87(Inter Face Driver)
(Sanyo model)
SKK/SKK TypeB
(SanyoFWS)
SKK-DBG TypeB
(SanyoFWS)
Application Version
1.04 or later
Chip Data Version
2.21 or later
LC87F1L16
(Note 2)
LC87F1L16A
Supported version
Rev 03.18c or later
Device
LC87F1L16A
For information about AF-Series:
Flash Support Group, Inc.
TEL: +81-53-459-1050
E-mail:
sales@j-fsg.co.jp
Note1: On-board-programmer from FSG (AF9101/AF9103) and serial interface driver from Our company (SIB87)
together can give a PC-less, standalone on-board-programming capabilities.
Note2: It needs a special programming devices and applications depending on the use of programming environment.
Please ask FSG or Our company for the information.
No.A1835-4/23
LC87F1L16A
Pin Assignment
UHBD+
UHBD-
P25/INT5
P24/INT5/INT7
P23/INT4
P22/INT4
P21/INT4
P20/INT4/INT6
P07/AN7/T7O
P06/AN6/T6O
P05/AN5/CKO
P04/AN4/DBGP2
UHAD-
UHAD+
VDD3
VSS3
P34/UFILT
P33
P32
P31/URX1
P30/UTX1
P70/INT0/T0LCP/AN8
P71/INT1/T0HCP/AN9
P72/INT2/T0IN
37
38
39
40
41
42
43
44
45
46
47
48
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
LC87F1L16A
P03/AN3/DBGP1
P02/AN2/DBGP0
P01/AN1
P00/AN0
VSS2
VDD2
PWM0
PWM1
P17/T1PWMH/BUZ
P16/T1PWML
P15/SCK1
P14/SI1/SB1
P73/INT3/T0IN
RES
XT1/AN10
XT2/AN11
VSS1
CF1
CF2
VDD1
P10/SO0
P11/SI0/SB0
P12/SCK0
P13/SO1
1
2
3
4
5
6
7
8
9
10
11
12
Top view
SQFP48(7×7) “Lead-/Halogen-free Type”
SQFP48
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
NAME
P73/INT3/T0IN
RES
XT1/AN10
XT2/AN11
VSS1
CF1
CF2
VDD1
P10/SO0
P11/SI0/SB0
P12/SCK0
P13/SO1
P14/SI1/SB1
P15/SCK1
P16/T1PWML
P17/T1PWMH/BUZ
PWM1
PWM0
VDD2
VSS2
P00/AN0
P01/AN1
P02/AN2/DBGP0
P03/AN3/DBGP1
SQFP48
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
NAME
P04/AN4/DBGP2
P05/AN5/CKO
P06/AN6/T6O
P07/AN7/T7O
P20/INT4/INT6
P21/INT4
P22/INT4
P23/INT4
P24/INT5/INT7
P25/INT5
UHBD-
UHBD+
UHAD-
UHAD+
VDD3
VSS3
P34/UFILT
P33
P32
P31/URX1
P30/UTX1
P70/INT0/T0LCP/AN8
P71/INT1/T0HCP/AN9
P72/INT2/T0IN
No.A1835-5/23
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