NT1GT72U8PA0BN-37B datasheet, PDF

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NT1GT72U8PA0BN-37B: DescriptionDDR DRAM Module, 128MX72, 0.5ns, CMOS, ROHS COMPLIANT, DIMM-240; Categorystorage storage; File Size416KB，24 Pages; ManufacturerNanya; Websitehttp://www.nanya.com/cn; Nanya Technology Co., Ltd. aims to become the best DRAM (dynamic random access memory) supplier. It emphasizes customer service and strengthens product R&D and manufacturing through close cooperation with partners, thereby providing customers with comprehensive products and system solutions. In the face of the growing niche DRAM market, Nanya Technology not only provides products ranging from 128Mb to 8Gb, but also continues to expand product diversification. The main application markets include digital TV, set-top box (STB), network communication, tablet computer and other smart electronic systems, automotive and industrial products. At the same time, in order to meet the needs of the rapidly growing mobile and wearable device market, Nanya Technology is more focused on the research and development and manufacturing of low-power memory products. In recent years, Nanya Technology has actively operated in the niche memory market, focusing on the research and development of low-power and customized core product lines. In terms of process progress, it has also introduced 20nm process technology and is committed to the production of DDR4 and LPDDR4 products, hoping to further enhance its overall competitiveness. Nanya Technology will also continue to strengthen its high value-added niche memory products and perfect customer service, enhance core business operating performance, ensure the rights and interests of all shareholders, and create sustainable business value for the company.

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NT1GT72U8PA0BN-37B Overview

DDR DRAM Module, 128MX72, 0.5ns, CMOS, ROHS COMPLIANT, DIMM-240

NT1GT72U8PA0BN-37B Parametric

Parameter Name	Attribute value
Maker	Nanya
Parts packaging code	DIMM
package instruction	DIMM,
Contacts	240
Reach Compliance Code	unknown
ECCN code	EAR99
access mode	DUAL BANK PAGE BURST
Maximum access time	0.5 ns
Other features	AUTO/SELF REFRESH
JESD-30 code	R-XDMA-N240
memory density	9663676416 bit
Memory IC Type	DDR DRAM MODULE
memory width	72
Number of functions	1
Number of ports	1
Number of terminals	240
word count	134217728 words
character code	128000000
Operating mode	SYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature
organize	128MX72
Package body material	UNSPECIFIED
encapsulated code	DIMM
Package shape	RECTANGULAR
Package form	MICROELECTRONIC ASSEMBLY
Certification status	Not Qualified
self refresh	YES
Maximum supply voltage (Vsup)	1.9 V
Minimum supply voltage (Vsup)	1.7 V
Nominal supply voltage (Vsup)	1.8 V
surface mount	NO
technology	CMOS
Temperature level	OTHER
Terminal form	NO LEAD
Terminal location	DUAL

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NT512T72U89A0BD / NT512T72U89A0BN / NT512T72U89A0BE

NT1GT72U8PA0BD / NT1GT72U8PA0BN / NT1GT72U8PA0BE

NT2GT72U4NA0BN

512MB: 64Mx72 / 1GB: 128Mx72 / 2GB: 128Mx72

Preliminary

240pin DDR2 SDRAM Fully Buffered DIMM

Based on 64Mx8 & 128Mx4 DDR2 SDRAM

Features

• 512MB 64Mx72 DDR2 Fully Buffered DIMM based on 64Mx8

DDR2 SDRAM.

• 1GB 128Mx72 DDR2 Fully Buffered DIMM based on 64Mx8

DDR2 SDRAM.

• 2GB 128Mx72 DDR2 Fully Buffered DIMM based on 128Mx4

DDR2 SDRAM.

• JEDEC Standard 240-pin Fully Buffered ECC Dual In-Line

Memory Module.

• Performance:

PC2-4200

Speed Sort

DIMM

Latency

Clock

Frequency

Clock

Cycle

DQ Burst

Frequency

-37B

266

3.75

533

PC2-5300

-3C

333

667

MHz

Unit

• Intended for 266MHz and 333MHz applications.

• Inputs and outputs are SSTL-18 compatible.

• V

= 1.8Volt ± 0.1, V

DDQ

= 1.8Volt ± 0.1.

• Host Interface and AMB component industry standard

compliant.

• Support SMBus protocol interface for access to the AMB

configuration registers.

• Detects errors on the channel and reports them to the host

memory controller.

• Automatic DDR2 DRAM Bus Calibration.

• Full Host Control of the DDR2 DRAMs.

• Over-Temperature Detection and Alert.

• MBIST & IBIST Test Functions.

• Transparent Mode for DRAM Test Support.

• Serial Presence Detect (SPD)

• Gold contacts

• RoHs Compliant products.

• SDRAMs in 60-ball FBGA Package

Description

NT512T72U89A0BD, NT512T72U89A0BN, NT512T72U89A0BE, NT1GT72U8PA0BD, NT1GT72U8PA0BN, NT1GT72U8PA0BE, and

NT2GT72U4NA0BN are Fully Buffered 240-Pin Double Data Rate 2 (DDR2) Synchronous DRAM Dual In-Line Memory Module (DIMM),

organized as a one bank 64Mx72 & 128Mx72 high-speed memory array. The module uses nine 64Mx8 (512MB), eighteen 64Mx8 (1GB),

and thirty-six 128Mx4 (2GB) DDR2 SDRAMs in FBGA packages. These DIMMs are manufactured using raw cards developed for broad

industry use as reference designs. The use of these common design files minimizes electrical variation between suppliers. All NANYA

DDR2 SDRAM DIMMs provide a high-performance, flexible 8-byte interface in a 5.25” long space-saving footprint.

The DIMM is intended for use in applications operating up to 333 MHz clock speeds and achieves high-speed data transfer rates of up to

667 MHz. Prior to any access operation, the device

latency and burst type/ length/operation type must be programmed into the

DIMM by address inputs A0-A13 and I/O inputs BA0 and BA1 using the mode register set cycle.

The DIMM uses serial presence-detect implemented via a serial 2,048-bit EEPROM using a standard IIC protocol. The first 128 bytes of

serial PD data are programmed and locked during module assembly. The remaining 128 bytes are available for use by the customer.

REV 0.3

09/14/2005

NANYA TECHNOLOGY CORP. reserves the right to change Products and Specifications without notice.

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