D2
PA
K
PSMN8R7-80BS
N-channel 80 V 8.7 mΩ standard level MOSFET in D2PAK
Rev. 2 — 2 March 2012
Product data sheet
1. Product profile
1.1 General description
Standard level N-channel MOSFET in D2PAK package qualified to 175 °C. This product is
designed and qualified for use in a wide range of industrial, communications and domestic
equipment.
1.2 Features and benefits
High efficiency due to low switching
and conduction losses
Suitable for standard level gate drive
1.3 Applications
DC-to-DC converters
Load switching
Motor control
Server power supplies
1.4 Quick reference data
Table 1.
Symbol
V
DS
I
D
P
tot
T
j
R
DSon
Quick reference data
Parameter
drain-source voltage
drain current
total power dissipation
junction temperature
drain-source on-state
resistance
V
GS
= 10 V; I
D
= 10 A; T
j
= 100 °C;
see
Figure 12
V
GS
= 10 V; I
D
= 10 A; T
j
= 25 °C;
see
Figure 13
Dynamic characteristics
Q
GD
Q
G(tot)
E
DS(AL)S
gate-drain charge
total gate charge
non-repetitive
drain-source
avalanche energy
V
GS
= 10 V; I
D
= 25 A; V
DS
= 40 V;
see
Figure 14;
see
Figure 15
-
-
-
11
52
-
-
-
120
nC
nC
mJ
Conditions
T
j
≥
25 °C; T
j
≤
175 °C
T
mb
= 25 °C; V
GS
= 10 V; see
Figure 1
T
mb
= 25 °C; see
Figure 2
Min
-
-
-
-55
-
-
Typ
-
-
-
-
-
7.5
Max
80
90
170
175
14
8.7
Unit
V
A
W
°C
mΩ
mΩ
Static characteristics
Avalanche ruggedness
V
GS
= 10 V; T
j(init)
= 25 °C; I
D
= 90 A;
V
sup
≤
80 V; R
GS
= 50
Ω;
unclamped
NXP Semiconductors
PSMN8R7-80BS
N-channel 80 V 8.7 mΩ standard level MOSFET in D2PAK
2. Pinning information
Table 2.
Pin
1
2
3
mb
Pinning information
Symbol Description
G
D
S
D
gate
drain
[1]
source
mounting base; connected to
drain
2
1
3
mb
D
Simplified outline
Graphic symbol
G
mbb076
S
SOT404 (D2PAK)
[1]
It is not possible to make connection to pin 2.
3. Ordering information
Table 3.
Ordering information
Package
Name
PSMN8R7-80BS
D2PAK
Description
Version
plastic single-ended surface-mounted package (D2PAK); 3 leads SOT404
(one lead cropped)
Type number
4. Limiting values
Table 4.
Symbol
V
DS
V
DGR
V
GS
I
D
I
DM
P
tot
T
stg
T
j
T
sld(M)
I
S
I
SM
E
DS(AL)S
Limiting values
Parameter
drain-source voltage
drain-gate voltage
gate-source voltage
drain current
peak drain current
total power dissipation
storage temperature
junction temperature
peak soldering temperature
source current
peak source current
non-repetitive drain-source
avalanche energy
T
mb
= 25 °C
pulsed; t
p
≤
10 µs; T
mb
= 25 °C
V
GS
= 10 V; T
j(init)
= 25 °C; I
D
= 90 A;
V
sup
≤
80 V; R
GS
= 50
Ω;
unclamped
V
GS
= 10 V; T
mb
= 100 °C; see
Figure 1
V
GS
= 10 V; T
mb
= 25 °C; see
Figure 1
pulsed; t
p
≤
10 µs; T
mb
= 25 °C;
see
Figure 3
T
mb
= 25 °C; see
Figure 2
Conditions
T
j
≥
25 °C; T
j
≤
175 °C
T
j
≥
25 °C; T
j
≤
175 °C; R
GS
= 20 kΩ
Min
-
-
-20
-
-
-
-
-55
-55
-
-
-
-
Max
80
80
20
64
90
361
170
175
175
260
90
361
120
Unit
V
V
V
A
A
A
W
°C
°C
°C
A
A
mJ
In accordance with the Absolute Maximum Rating System (IEC 60134).
Source-drain diode
Avalanche ruggedness
PSMN8R7-80BS
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 2 — 2 March 2012
2 of 14
NXP Semiconductors
PSMN8R7-80BS
N-channel 80 V 8.7 mΩ standard level MOSFET in D2PAK
100
I
D
(A)
80
003aad363
120
P
der
(%)
80
03aa16
60
40
40
20
0
0
50
100
150
T
mb
(°C)
200
0
0
50
100
150
T
mb
(°C)
200
Fig 1.
Continuous drain current as a function of
mounting base temperature
Fig 2.
Normalized total power dissipation as a
function of mounting base temperature
003aad387
10
3
I
D
(A)
10
2
100
μs
10
Limit R
DSon
= V
DS
/ I
D
10
μs
DC
1
1 ms
10 ms
100 ms
10
-1
1
10
10
2
V
DS
(V)
10
3
Fig 3.
Safe operating area; continuous and peak drain currents as a function of drain-source voltage
PSMN8R7-80BS
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 2 — 2 March 2012
3 of 14
NXP Semiconductors
PSMN8R7-80BS
N-channel 80 V 8.7 mΩ standard level MOSFET in D2PAK
5. Thermal characteristics
Table 5.
Symbol
R
th(j-mb)
R
th(j-a)
Thermal characteristics
Parameter
Conditions
Min
-
-
Typ
0.54
50
Max
0.88
-
Unit
K/W
K/W
thermal resistance from junction to see
Figure 4
mounting base
thermal resistance from junction to Minimum footprint; mounted on a
ambient
printed circuit board
1
Z
th(j-mb)
δ
= 0.5
(K/W)
0.2
10
-1
0.1
0.05
0.02
10
-2
003aad355
P
δ
=
t
p
T
10
-3
single shot
t
p
T
t
10
-4
10
-6
10
-5
10
-4
10
-3
10
-2
10
-1
t
p
(s)
1
Fig 4.
Transient thermal impedance from junction to mounting base as a function of pulse duration; typical
values
PSMN8R7-80BS
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 2 — 2 March 2012
4 of 14
NXP Semiconductors
PSMN8R7-80BS
N-channel 80 V 8.7 mΩ standard level MOSFET in D2PAK
6. Characteristics
Table 6.
Symbol
V
(BR)DSS
V
GS(th)
Characteristics
Parameter
drain-source
breakdown voltage
gate-source threshold
voltage
Conditions
I
D
= 250 µA; V
GS
= 0 V; T
j
= -55 °C
I
D
= 250 µA; V
GS
= 0 V; T
j
= 25 °C
I
D
= 1 mA; V
DS
= V
GS
; T
j
= 175 °C;
see
Figure 10
I
D
= 1 mA; V
DS
= V
GS
; T
j
= -55 °C;
see
Figure 10
I
D
= 1 mA; V
DS
= V
GS
; T
j
= 25 °C;
see
Figure 11;
see
Figure 10
I
DSS
I
GSS
R
DSon
drain leakage current
gate leakage current
drain-source on-state
resistance
V
DS
= 80 V; V
GS
= 0 V; T
j
= 25 °C
V
DS
= 80 V; V
GS
= 0 V; T
j
= 125 °C
V
GS
= -20 V; V
DS
= 0 V; T
j
= 25 °C
V
GS
= 20 V; V
DS
= 0 V; T
j
= 25 °C
V
GS
= 10 V; I
D
= 10 A; T
j
= 175 °C;
see
Figure 12
V
GS
= 10 V; I
D
= 10 A; T
j
= 100 °C;
see
Figure 12
V
GS
= 10 V; I
D
= 10 A; T
j
= 25 °C;
see
Figure 13
R
G
internal gate resistance f = 1 MHz
(AC)
total gate charge
gate-source charge
pre-threshold
gate-source charge
post-threshold
gate-source charge
gate-drain charge
gate-source plateau
voltage
input capacitance
output capacitance
reverse transfer
capacitance
turn-on delay time
rise time
turn-off delay time
fall time
All information provided in this document is subject to legal disclaimers.
Tested to JEDEC standards where applicable.
Min
73
80
1
-
2.3
-
-
-
-
-
-
-
-
Typ
-
-
-
-
3
0.3
-
10
10
-
-
7.5
1
Max
-
-
-
4.6
4
5
100
100
100
20.88
14
8.7
-
Unit
V
V
V
V
V
µA
µA
nA
nA
mΩ
mΩ
mΩ
Ω
Static characteristics
Dynamic characteristics
Q
G(tot)
Q
GS
Q
GS(th)
Q
GS(th-pl)
Q
GD
V
GS(pl)
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
PSMN8R7-80BS
I
D
= 0 A; V
DS
= 0 V; V
GS
= 10 V
I
D
= 25 A; V
DS
= 40 V; V
GS
= 10 V;
see
Figure 14;
see
Figure 15
I
D
= 25 A; V
DS
= 40 V; V
GS
= 10 V;
see
Figure 14
-
-
-
-
-
44
52
15
9.2
5.8
11
4.6
3346
296
158
21
26
46
20
-
-
-
-
-
-
-
-
-
-
-
-
-
-
nC
nC
nC
nC
nC
nC
V
pF
pF
pF
ns
ns
ns
ns
I
D
= 25 A; V
DS
= 40 V; V
GS
= 10 V;
see
Figure 14;
see
Figure 15
I
D
= 25 A; V
DS
= 40 V; see
Figure 15
V
DS
= 40 V; V
GS
= 0 V; f = 1 MHz;
T
j
= 25 °C; see
Figure 16
-
-
-
-
-
V
DS
= 40 V; R
L
= 1.6
Ω;
V
GS
= 10 V;
R
G(ext)
= 4.7
Ω
-
-
-
-
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 2 — 2 March 2012
5 of 14
stm32/stm8
京公网安备 11010802033920号
EEWORLD
