HIP6013
NOT RECOMMENDED FOR NEW DESIGNS
NO RECOMMENDED REPLACEMENT
contact our Technical Support Center at
1-888-INTERSIL or www.intersil.com/tsc
DATASHEET
FN4325
Rev 1.00
November 3, 2005
Buck Pulse-Width Modulator (PWM) Controller
The HIP6013 provides complete control and protection for a
DC-DC converter optimized for high-performance
microprocessor applications. It is designed to drive an
N-Channel MOSFET in a standard buck topology. The
HIP6013 integrates all of the control, output adjustment,
monitoring and protection functions into a single package.
The output voltage of the converter can be precisely
regulated to as low as 1.27V, with a maximum tolerance of
1.5%
over temperature and line voltage variations.
The HIP6013 provides simple, single feedback loop,
voltage-mode control with fast transient response. It includes
a 200kHz free-running triangle-wave oscillator that is
adjustable from below 50kHz to over 1MHz. The error
amplifier features a 15MHz gain-bandwidth product and
6V/s slew rate which enables high converter bandwidth for
fast transient performance. The resulting PWM duty ratio
ranges from 0% to 100%.
The HIP6013 protects against over-current conditions by
inhibiting PWM operation. The HIP6013 monitors the current
by using the r
DS(ON)
of the upper MOSFET which eliminates
the need for a current sensing resistor.
Features
• Drives N-Channel MOSFET
• Operates From +5V or +12V Input
• Simple Single-Loop Control Design
- Voltage-Mode PWM Control
• Fast Transient Response
- High-Bandwidth Error Amplifier
- Full 0% to 100% Duty Ratio
• Excellent Output Voltage Regulation
- 1.27V Internal Reference
-
1.5%
Over Line Voltage and Temperature
• Over-Current Fault Monitor
- Does Not Require Extra Current Sensing Element
- Uses MOSFET’s r
DS(on)
• Small Converter Size
- Constant Frequency Operation
- 200kHz Free-Running Oscillator Programmable from
50kHz to Over 1MHz
• 14 Ld, SOIC Package
• Pb-Free Plus Anneal Available (RoHS Compliant)
Ordering Information
PART
NUMBER
HIP6013CB
PART
TEMP. RANGE
PKG.
MARKING
(°C)
PACKAGE DWG. #
HIP6013CB
0 to 70
0 to 70
14 Ld SOIC M14.15
14 Ld SOIC M14.15
(Pb-free)
Applications
• Power Supply for Pentium®, Pentium Pro, PowerPC™
and Alpha™ Microprocessors
• High-Power 5V to 3.xV DC-DC Regulators
• Low-Voltage Distributed Power Supplies
HIP6013CBZ 6013CBZ
(See Note)
Add “-T” suffix for tape and reel.
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100%
matte tin plate termination finish, which are RoHS compliant and
compatible with both SnPb and Pb-free soldering operations. Intersil
Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
Pinout
HIP6013
(SOIC)
TOP VIEW
RT
OCSET
SS
COMP
FB
EN
GND
1
2
3
4
5
6
7
14 VCC
13 NC
12 NC
11 NC
10 BOOT
9
8
UGATE
PHASE
FN4325 Rev 1.00
November 3, 2005
Page 1 of 11
HIP6013
Typical Application
12V
VCC
SS
MONITOR AND
PROTECTION
OCSET
EN
BOOT
RT
OSC
UGATE
PHASE
+V
O
+5V OR +12V
HIP6013
REF
-
+
FB
+
-
COMP
Block Diagram
VCC
POWER-ON
RESET (POR)
10A
OCSET
+
EN
-
OVER-
CURRENT
4V
SOFT-
START
SS
BOOT
UGATE
PHASE
200A
REFERENCE
1.27 VREF
PWM
COMPARATOR
+
-
+
INHIBIT
PWM
-
GATE
CONTROL
LOGIC
FB
COMP
ERROR
AMP
GND
RT
OSCILLATOR
FN4325 Rev 1.00
November 3, 2005
Page 2 of 11
HIP6013
Absolute Maximum Ratings
Supply Voltage, V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +15.0V
Boot Voltage, V
BOOT
- V
PHASE
. . . . . . . . . . . . . . . . . . . . . . +15.0V
Input, Output or I/O Voltage . . . . . . . . . . . GND -0.3V to VCC +0.3V
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 2
Thermal Information
Thermal Resistance (Typical, Note 1)
JA
(
o
C/W)
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
185
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . 150
o
C
Maximum Storage Temperature Range . . . . . . . . . -65
o
C to 150
o
C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300
o
C
(SOIC - Lead Tips Only)
Operating Conditions
Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . +12V
10%
Ambient Temperature Range. . . . . . . . . . . . . . . . . . . . . 0
o
C to 70
o
C
Junction Temperature Range . . . . . . . . . . . . . . . . . . . 0
o
C to 125
o
C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1.
JA
is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
PARAMETER
VCC SUPPLY CURRENT
Nominal Supply
Shutdown Supply
POWER-ON RESET
Rising VCC Threshold
Falling VCC Threshold
Enable - Input threshold Voltage
Rising V
OCSET
Threshold
OSCILLATOR
Free Running Frequency
Total Variation
Ramp Amplitude
REFERENCE
Reference Voltage
ERROR AMPLIFIER
DC Gain
Gain-Bandwidth Product
Slew Rate
GATE DRIVERS
Upper Gate Source
Upper Gate Sink
PROTECTION
OCSET Current Source
Soft Start Current
I
OCSET
I
SS
V
OCSET
= 4.5VDC
170
-
200
10
230
-
A
A
I
UGATE
R
UGATE
V
BOOT
- V
PHASE
= 12V, V
UGATE
= 6V
I
LGATE
= 0.3A
350
-
500
5.5
-
10
mA
GBW
SR
COMP = 10pF
-
-
-
88
15
6
-
-
-
dB
MHz
V/s
1.251
1.270
1.289
V
V
OSC
RT = OPEN, V
CC
= 12
6k < RT to GND < 200k
RT = OPEN
180
-20
-
200
-
1.9
220
+20
-
kHz
%
V
P-P
V
OCSET
= 4.5VDC
V
OCSET
= 4.5VDC
V
OCSET
= 4.5VDC
-
8.8
0.8
-
-
-
-
1.27
10.4
-
2.0
-
V
V
V
V
I
CC
EN = VCC; UGATE and LGATE Open
EN = 0V
-
-
5
50
-
100
mA
A
Recommended Operating Conditions, Unless Otherwise Noted
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
FN4325 Rev 1.00
November 3, 2005
Page 3 of 11
HIP6013
Typical Performance Curves
40
R
T
PULLUP
TO +12V
35
30
25
100
R
T
PULLDOWN
TO V
SS
I
CC
(mA)
20
15
10
5
10
100
SWITCHING FREQUENCY (kHz)
1000
0
100
C
GATE
= 10pF
C
GATE
= 1000pF
C
GATE
= 3300pF
1000
RESISTANCE (k)
10
200
300 400 500 600 700 800
SWITCHING FREQUENCY (kHz)
900
1000
FIGURE 1. R
T
RESISTANCE vs FREQUENCY
FIGURE 2. BIAS SUPPLY CURRENT vs FREQUENCY
Functional Pin Description
RT
OCSET
SS
COMP
FB
EN
GND
1
2
3
4
5
6
7
14 VCC
13 NC
12 NC
11 NC
10 BOOT
9
8
UGATE
PHASE
SS (Pin 3)
Connect a capacitor from this pin to ground. This capacitor,
along with an internal 10A current source, sets the soft-start
interval of the converter.
COMP (Pin 4) and FB (Pin 5)
COMP and FB are the available external pins of the error
amplifier. The FB pin is the inverting input of the error amplifier
and the COMP pin is the error amplifier output. These pins are
used to compensate the voltage-control feedback loop of the
converter.
RT (Pin 1)
This pin provides oscillator switching frequency adjustment. By
placing a resistor (R
T
) from this pin to GND, the nominal
200kHz switching frequency is increased according to the
following equation:
5
10
Fs
200kHz
+ ------------------
R
T
6
EN (Pin 6)
This pin is the open-collector enable pin. Pull this pin below 1V
to disable the converter. In shutdown, the soft start pin is
discharged and the UGATE and LGATE pins are held low.
GND (Pin 7)
(R
T
to GND)
Signal ground for the IC. All voltage levels are measured with
respect to this pin.
Conversely, connecting a pull-up resistor (R
T
) from this pin to
VCC reduces the switching frequency according to the
following equation.:
4
10
Fs
200kHz
– ------------------
R
T
7
PHASE (Pin 8)
Connect the PHASE pin to the upper MOSFET source. This
pin is used to monitor the voltage drop across the MOSFET for
over-current protection. This pin also provides the return path
for the upper gate drive.
(R
T
to 12V)
OCSET (Pin 2)
Connect a resistor (R
OCSET
) from this pin to the drain of the
upper MOSFET. R
OCSET
, an internal 200A current source
(I
OCS
), and the upper MOSFET on-resistance (r
DS(ON)
) set
the converter over-current (OC) trip point according to the
following equation:
I
OCS
R
OCSET
I
PEAK
= -------------------------------------------
-
r
DS
ON
UGATE (Pin 9)
Connect UGATE to the upper MOSFET gate. This pin provides
the gate drive for the upper MOSFET.
BOOT (Pin 10)
This pin provides bias voltage to the upper MOSFET driver. A
bootstrap circuit may be used to create a BOOT voltage
suitable to drive a standard N-Channel MOSFET.
VCC (Pin 14)
Provide a 12V bias supply for the chip to this pin.
An over-current trip cycles the soft-start function.
FN4325 Rev 1.00
November 3, 2005
Page 4 of 11
HIP6013
Functional Description
Initialization
The HIP6013 automatically initializes upon receipt of power.
Special sequencing of the input supplies is not necessary.
The Power-On Reset (POR) function continually monitors
the input supply voltages and the enable (EN) pin. The POR
monitors the bias voltage at the VCC pin and the input
voltage (V
IN
) on the OCSET pin. The level on OCSET is
equal to V
IN
less a fixed voltage drop (see over-current
protection). With the EN pin held to VCC, the POR function
initiates soft start operation after both input supply voltages
exceed their POR thresholds. For operation with a single
+12V power source, V
IN
and V
CC
are equivalent and the
+12V power source must exceed the rising V
CC
threshold
before POR initiates operation.
The Power-On Reset (POR) function inhibits operation with
the chip disabled (EN pin low). With both input supplies
above their POR thresholds, transitioning the EN pin high
initiates a soft start interval.
SOFT-START
(1V/DIV)
0V
0V
t1
t2
OUTPUT
VOLTAGE
(1V/DIV)
t3
TIME (5ms/DIV)
FIGURE 3. SOFT-START INTERVAL
Over-Current Protection
The over-current function protects the converter from a
shorted output by using the upper MOSFET’s on-resistance,
r
DS(ON)
to monitor the current. This method enhances the
converter’s efficiency and reduces cost by eliminating a
current sensing resistor.
The over-current function cycles the soft-start function in a
hiccup mode to provide fault protection. A resistor (R
OCSET
)
programs the over-current trip level. An internal 200A
(typical) current sink develops a voltage across R
OCSET
that
is reference to V
IN
. When the voltage across the upper
MOSFET (also referenced to V
IN
) exceeds the voltage
across R
OCSET
, the over-current function initiates a soft-
start sequence. The soft-start function discharges C
SS
with
a 10A current sink and inhibits PWM operation. The soft-
start function recharges C
SS
, and PWM operation resumes
with the error amplifier clamped to the SS voltage. Should an
overload occur while recharging C
SS
, the soft start function
inhibits PWM operation while fully charging C
SS
to 4V to
complete its cycle. Figure 4 shows this operation with an
overload condition. Note that the inductor current increases
to over 15A during the C
SS
charging interval and causes an
over-current trip. The converter dissipates very little power
with this method. The measured input power for the
conditions of Figure 4 is 2.5W.
Soft Start
The POR function initiates the soft start sequence. An
internal 10A current source charges an external capacitor
(C
SS
) on the SS pin to 4V. Soft start clamps the error
amplifier output (COMP pin) and reference input (+ terminal
of error amp) to the SS pin voltage. Figure 3 shows the soft
start interval with C
SS
= 0.1F. Initially the clamp on the
error amplifier (COMP pin) controls the converter’s output
voltage. At t1 in Figure 3, the SS voltage reaches the valley
of the oscillator’s triangle wave. The oscillator’s triangular
waveform is compared to the ramping error amplifier
voltage. This generates PHASE pulses of increasing width
that charge the output capacitor(s). This interval of
increasing pulse width continues to t2. With sufficient output
voltage, the clamp on the reference input controls the output
voltage. This is the interval between t2 and t3 in Figure 3. At
t3 the SS voltage exceeds the reference voltage and the
output voltage is in regulation. This method provides a rapid
and controlled output voltage rise.
FN4325 Rev 1.00
November 3, 2005
Page 5 of 11