Product available in Radiation Tolerant and Radiation Enhanced
versions
Available in PDIP, SOIC, SSOP, QSOP, and TSSOP packages
Std., A, and C speed grades
Resistor outputs (-15mA I
OH
, 12mA I
OL
)
Reduced system switching noise
DESCRIPTION:
The FCT2646T consists of a bus transceiver with 3-state D-type flip-flops
and control circuitry arranged for multiplexed transmission of data directly
from the data bus or from the internal storage registers. The FCT2646T
utilizes the enable control (G) and direction (DIR) pins to control the
transceiver functions.
SAB and SBA control pins are provided to select either real- time or stored
data transfer. The circuitry used for select control will eliminate the typical
decoding glitch that occurs in a multiplexer during the transition between
stored and real-time data. A low input level selects real-time data and a high
selects stored data.
Data on the A or B data bus, or both, can be stored in the internal D flip-
flops by low-to-high transitions at the appropriate clock pins (CPAB or
CPBA), regardless of the select or enable control pins.
The FCT2646T have balanced drive outputs with current limiting
resistors. This offers low ground bounce, minimal undershoot and con-
trolled output fall times-reducing the need for external series terminating
resistors. FCT2646T parts are plug-in replacements for FCT646T parts.
FUNCTIONAL BLOCK DIAGRAM
G
DIR
CPBA
SBA
CPAB
SAB
B REG
ONE OF EIGH T CHANNELS
1D
C1
A1
A REG
1D
C1
B1
TO SEVEN OTHER CHANN ELS
COMMERCIAL TEMPERATURE RANGE
1
c
1999 Integrated Device Technology, Inc.
SEPTEMBER 1999
DSC-5506/-
IDT74FCT2646T/AT/CT
FAST CMOS OCTAL TRANSCEIVER/REGISTER (3-STATE)
COMMERCIAL TEMPERATURE RANGE
PIN CONFIGURATION
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
TERM(2)
Rating
Terminal Voltage with Respect to GND
Terminal Voltage with Respect to GND
Storage Temperature
DC Output Current
Max.
–0.5 to +7
–0.5 to V
CC
+0.5
–65 to +150
–65 to +120
Unit
V
V
°C
mA
8T-link
CPAB
SAB
DIR
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
GND
1
2
3
4
5
6
7
8
9
10
11
12
P24-1
D24-1
SO24-2
SO24-7
SO24-8
SO24-9
24
23
22
21
20
19
18
17
16
15
14
13
V
CC
CPBA
SBA
G
B
1
B
2
B
3
B
4
B
5
B
6
B
7
B
8
V
TERM(3)
T
STG
I
OUT
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or
any other conditions above those indicated in the operational sections
of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect reliability.
No
terminal voltage may exceed Vcc by +0.5V unless otherwise noted.
2. Inputs and Vcc terminals only.
3. Outputs and I/O terminals only.
CAPACITANCE
(T
A
= +25
O
C, f = 1.0MHz)
Symbol
C
IN
C
OUT
Parameter
(1)
Input Capacitance
Output Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
Typ.
6
8
Max.
10
12
Unit
pF
pF
8T-link
NOTE:
1. This parameter is measured at characterization but not tested.
PDIP/ SOIC/ SSOP/ QSOP/ TSSOP
TOP VIEW
PIN DESCRIPTION
Pin Names
A
1
- A
8
B
1
- B
8
CPAB, CPBA
SAB, SBA
DIR,
G
Description
Data Register A Inputs
Data Register B Outputs
Data Register B Inputs
Data Register A Outputs
Clock Pulse Inputs
Output Data Source Select Inputs
Output Enable Inputs
2
IDT74FCT2646T/AT/CT
FAST CMOS OCTAL TRANSCEIVER/REGISTER (3-STATE)
COMMERCIAL TEMPERATURE RANGE
FUNCTION TABLE
(1)
Inputs
G
H
H
L
L
L
L
DIR
X
X
L
L
H
H
CPAB
H or L
↑
X
X
X
H or L
CPBA
H or L
↑
X
H or L
X
X
SAB
X
X
X
X
L
H
SBA
X
X
L
H
X
X
A
1
- A
8
Input
Output
Input
Data I/O
(2)
B
1
- B
8
Input
Input
Output
Isolation
Store A and B Data
Real-Time B Data to A Bus
Stored B Data to A Bus
Real-Time A Data to B Bus
Stored A Data to B Bus
Operation
NOTES:
1. H = HIGH
L = LOW
X = Don't Care
↑
= LOW-to-HIGH transition.
Select control = L: clocks can occur simultaneously.
Select control = H: clocks must be staggered in order to load both registers.
2. The data output functions may be enabled or disabled by various signals at the GAB or GBA inputs. Data input functions are always enabled, i.e. data
at the bus pins will be stored on every LOW-to-HIGH transition on the clock inputs.
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Commercial: T
A
= -40°C to +85°C, V
CC
= 5.0V ± 5%
Symbol
V
IH
V
IL
I
IH
I
IL
I
OZH
I
OZL
I
I
V
IK
V
H
I
CC
Parameter
Input HIGH Level
Input LOW Level
Input HIGH Current
(4)
Input LOW Current
(4)
High Impedance Output Current
(3-State Output pins)
(4)
Input HIGH Current
(4)
Clamp Diode Voltage
Input Hysteresis
Quiescent Power Supply Current
V
CC
= Max., V
I
= V
CC
(Max.)
V
CC
= Min., I
IN
= –18mA
—
V
CC
= Max., V
IN
= GND or V
CC
V
CC
= Max.
Test Conditions
(1)
Guaranteed Logic HIGH Level
Guaranteed Logic LOW Level
V
CC
= Max.
V
I
= 2.7V
V
I
= 0.5V
V
O
= 2.7V
V
O
= 0.5V
Min.
2
—
—
—
—
—
—
—
—
—
Typ.
(2)
—
—
—
—
—
—
—
–0.7
200
0.01
Max.
—
0.8
±1
±1
±1
±1
±1
–1.2
—
1
µA
V
mV
mA
µA
Unit
V
V
µA
OUTPUT DRIVE CHARACTERISTICS
Symbol
I
ODL
I
ODH
V
OH
V
OL
Parameter
Output LOW Current
Output HIGH Current
Output HIGH Voltage
Output LOW Voltage
Test Conditions
(1)
V
CC
= 5V, V
IN
=
V
IH
or V
IL,
V
OUT
= 1.5V
(3)
V
CC
= 5V, V
IN
=
V
IH
or V
IL,
V
OUT
= 1.5V
(3)
V
CC
= Min.
I
OH
= –15mA
I
OL
= 12mA
Min.
16
–16
2.4
—
Typ.
(2)
48
–48
3.3
0.3
Max.
—
—
—
0.5
Unit
mA
µA
V
V
V
IN
= V
IH
or V
IL
V
CC
= Min.
V
IN
= V
IH
or V
IL
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 5.0V, +25°C ambient.
3. Not more than one output should be shorted at one time. Duration of the short circuit test should not exceed one second.
4. The test limit for this parameter is ±5µA at T
A
= –55°C.
5. This parameter is guaranteed but not tested.
3
IDT74FCT2646T/AT/CT
FAST CMOS OCTAL TRANSCEIVER/REGISTER (3-STATE)
COMMERCIAL TEMPERATURE RANGE
BU S
A
BU S
B
BU S
A
BU S
B
D IR
L
G
L
C PAB
X
C PBA
X
SAB
X
SBA
L
D IR
H
G
L
C PAB
X
C PBA
X
SAB
L
SBA
X
REAL-TIME TRANSFER
BUS B TO A
REAL-TIME TRANSFER
BUS A TO B
BU S
A
BU S
B
BU S
A
BU S
B
D IR
H
L
X
G
L
L
H
C PAB
↑
C PBA
X
↑
↑
SAB
X
X
X
SBA
X
X
X
X
↑
D IR
L
H
G
L
L
C PAB
X
H or
C PBA
H or
X
SAB
X
H
SBA
H
X
STORAGE FROM
A AND/OR B
TRANSFER STORES
(1)
DATA TO A AND/OR B
NOTE:
1. Cannot transfer data to A bus and B bus simultaneously.
4
IDT74FCT2646T/AT/CT
FAST CMOS OCTAL TRANSCEIVER/REGISTER (3-STATE)
COMMERCIAL TEMPERATURE RANGE
POWER SUPPLY CHARACTERISTICS
Symbol
∆I
CC
I
CCD
Parameter
Quiescent Power Supply Current
TTL Inputs HIGH
Dynamic Power Supply Current
(4)
Test Conditions
(1)
V
CC
= Max.
V
IN
= 3.4V
(3)
V
CC
= Max.
Outputs Open
G
= DIR = GND
One Input Toggling
50% Duty Cycle
V
CC
= Max.
Outputs Open
f
CP
= 10MHz
50% Duty Cycle
G
= DIR = GND
One Bit Toggling
at fi = 5MHz
50% Duty Cycle
V
CC
= Max.
Outputs Open
f
CP
= 10MHz
50% Duty Cycle
G
= DIR = GND
Eight Bits Toggling
at fi = 2.5MHz
50% Duty Cycle
Min.
—
—
Typ.
(2)
0.5
0.06
Max.
2
0.12
Unit
mA
mA/
MHz
V
IN
= V
CC
V
IN
= GND
I
C
Total Power Supply Current
(6)
V
IN
= V
CC
V
IN
= GND
—
0.6
2.2
mA
V
IN
= 3.4
V
IN
= GND
—
1.1
4.2
V
IN
= V
CC
V
IN
= GND
—
1.5
4
(5)
V
IN
= 3.4
V
IN
= GND
—
3.8
13
(
5)
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25°C ambient.
3. Per TTL driven input (V
IN
= 3.4V). All other inputs at V
CC
or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the I
CC
formula. These limits are guaranteed but not tested.
6. I
C
= I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
∆I
CC
D
H
N
T
+ I
CCD
(f
CP/
2 + f
i
N
i
)
I
CC
= Quiescent Current
∆I
CC
= Power Supply Current for a TTL High Input (V
IN
= 3.4V)
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
f
CP
= Clock Frequency for Register Devices (Zero for Non-Register Devices)
f
i
= Input Frequency
N
i
= Number of Inputs at f
i
All currents are in milliamps and all frequencies are in megahertz.
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