BUK7Y3R5-40E
19 June 2015
N-channel 40 V, 3.5 mΩ standard level MOSFET in LFPAK56
Product data sheet
1. General description
Standard level N-channel MOSFET in an LFPAK56 (Power SO8) package using
TrenchMOS technology. This product has been designed and qualified to AEC Q101
standard for use in high performance automotive applications.
2. Features and benefits
•
•
•
•
Q101 Compliant
Repetitive avalanche rated
Suitable for thermally demanding environments due to 175 °C rating
True standard level gate with V
GS(th)
rating of greater than 1 V at 175 °C
3. Applications
•
•
•
•
12 V Automotive systems
Motors, lamps and solenoid control
Transmission control
Ultra high performance power switching
4. Quick reference data
Table 1.
Symbol
V
DS
I
D
P
tot
R
DSon
Quick reference data
Parameter
drain-source voltage
drain current
total power dissipation
Conditions
T
j
≥ 25 °C; T
j
≤ 175 °C
V
GS
= 10 V; T
mb
= 25 °C;
Fig. 2
T
mb
= 25 °C;
Fig. 1
V
GS
= 10 V; I
D
= 25 A; T
j
= 25 °C;
Fig. 11
V
GS
= 10 V; I
D
= 25 A; V
DS
= 32 V;
T
j
= 25 °C;
Fig. 13; Fig. 14
[1]
Continuous current is limited by package.
[1]
Min
-
-
-
Typ
-
-
-
Max
40
100
167
Unit
V
A
W
Static characteristics
drain-source on-state
resistance
-
2.5
3.5
mΩ
Dynamic characteristics
Q
GD
gate-drain charge
-
16.2
-
nC
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NXP Semiconductors
BUK7Y3R5-40E
N-channel 40 V, 3.5 mΩ standard level MOSFET in LFPAK56
5. Pinning information
Table 2.
Pin
1
2
3
4
mb
Pinning information
Symbol Description
S
S
S
G
D
source
source
source
gate
mounting base; connected to
drain
1 2 3 4
G
mbb076
Simplified outline
mb
Graphic symbol
D
S
LFPAK56; Power-
SO8 (SOT669)
6. Ordering information
Table 3.
Ordering information
Package
Name
BUK7Y3R5-40E
LFPAK56;
Power-SO8
Description
Plastic single-ended surface-mounted package (LFPAK56;
Power-SO8); 4 leads
Version
SOT669
Type number
7. Marking
Table 4.
Marking codes
Marking code
73E540
Type number
BUK7Y3R5-40E
8. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
V
DS
V
DGR
V
GS
P
tot
I
D
Parameter
drain-source voltage
drain-gate voltage
gate-source voltage
total power dissipation
drain current
Conditions
T
j
≥ 25 °C; T
j
≤ 175 °C
R
GS
= 20 kΩ
T
j
≤ 175 °C; DC
T
mb
= 25 °C;
Fig. 1
T
mb
= 25 °C; V
GS
= 10 V;
Fig. 2
T
mb
= 100 °C; V
GS
= 10 V;
Fig. 2
I
DM
T
stg
BUK7Y3R5-40E
Min
-
-
-20
-
[1]
[1]
Max
40
40
20
167
100
100
622
175
Unit
V
V
V
W
A
A
A
°C
-
-
-
-55
peak drain current
storage temperature
T
mb
= 25 °C; pulsed; t
p
≤ 10 µs;
Fig. 3
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved
Product data sheet
19 June 2015
2 / 13
NXP Semiconductors
BUK7Y3R5-40E
N-channel 40 V, 3.5 mΩ standard level MOSFET in LFPAK56
Symbol
T
j
I
S
I
SM
E
DS(AL)S
Parameter
junction temperature
Conditions
Min
-55
Max
175
Unit
°C
Source-drain diode
source current
peak source current
T
mb
= 25 °C
pulsed; t
p
≤ 10 µs; T
mb
= 25 °C
I
D
= 100 A; V
sup
≤ 40 V; R
GS
= 50 Ω;
V
GS
= 10 V; T
j(init)
= 25 °C; unclamped;
Fig. 4
[1]
[2]
[3]
120
P
der
(%)
80
(1)
[1]
-
-
100
622
A
A
Avalanche ruggedness
non-repetitive drain-source
avalanche energy
[2][3]
-
135
mJ
Continuous current is limited by package.
Single-pulse avalanche rating limited by maximum junction temperature of 175 °C.
Refer to application note AN10273 for further information.
03aa16
I
D
(A)
160
003aag963
120
80
40
40
0
0
50
100
150
T
mb
(°C)
200
0
0
30
60
90
120
150
T
mb
(°C)
180
Fig. 1.
Normalized total power dissipation as a
function of mounting base temperature
Fig. 2.
Continuous drain current as a function of
mounting base temperature
BUK7Y3R5-40E
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved
Product data sheet
19 June 2015
3 / 13
NXP Semiconductors
BUK7Y3R5-40E
N-channel 40 V, 3.5 mΩ standard level MOSFET in LFPAK56
I
D
(A)
10
3
Limit R
DSon
= V
DS
/ I
D
10
2
003aag965
t
p
= 10 us
100 us
10
DC
1 ms
1
10 ms
100 ms
10
-1
10
-1
1
10
V
DS
(V)
10
2
Fig. 3.
Safe operating area; continuous and peak drain currents as a function of drain-source voltage
10
3
I
AL
(A)
10
2
003aag964
10
(1)
(2)
1
(3)
10
-1
10
-3
10
-2
10
-1
1
t
AL
(ms)
10
Fig. 4.
Avalanche rating; avalanche current as a function of avalanche time
9. Thermal characteristics
Table 6.
Symbol
R
th(j-mb)
Thermal characteristics
Parameter
thermal resistance
from junction to
mounting base
Conditions
Fig. 5
Min
-
Typ
-
Max
0.9
Unit
K/W
BUK7Y3R5-40E
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved
Product data sheet
19 June 2015
4 / 13
NXP Semiconductors
BUK7Y3R5-40E
N-channel 40 V, 3.5 mΩ standard level MOSFET in LFPAK56
Z
th(j-mb)
(K/W)
1
δ = 0.5
0.2
003aai928
10
-1
0.1
0.05
0.02
single shot
P
δ=
t
p
T
10
-2
t
p
10
-3
10
-6
10
-5
10
-4
10
-3
10
-2
10
-1
t
T
t
p
(s)
1
Fig. 5.
Transient thermal impedance from junction to mounting base as a function of pulse duration
10. Characteristics
Table 7.
Symbol
V
(BR)DSS
Characteristics
Parameter
drain-source
breakdown voltage
gate-source threshold
voltage
Conditions
I
D
= 250 µA; V
GS
= 0 V; T
j
= 25 °C
I
D
= 250 µA; V
GS
= 0 V; T
j
= -55 °C
I
D
= 1 mA; V
DS
= V
GS
; T
j
= 25 °C;
Fig. 9; Fig. 10
I
D
= 1 mA; V
DS
= V
GS
; T
j
= -55 °C;
Fig. 9
I
D
= 1 mA; V
DS
= V
GS
; T
j
= 175 °C;
Fig. 9
I
DSS
drain leakage current
V
DS
= 40 V; V
GS
= 0 V; T
j
= 25 °C
V
DS
= 40 V; V
GS
= 0 V; T
j
= 175 °C
I
GSS
gate leakage current
V
GS
= 20 V; V
DS
= 0 V; T
j
= 25 °C
V
GS
= -20 V; V
DS
= 0 V; T
j
= 25 °C
R
DSon
drain-source on-state
resistance
V
GS
= 10 V; I
D
= 25 A; T
j
= 25 °C;
Fig. 11
V
GS
= 10 V; I
D
= 25 A; T
j
= 175 °C;
Fig. 11; Fig. 12
Dynamic characteristics
Q
G(tot)
Q
GS
Q
GD
BUK7Y3R5-40E
Min
40
36
2.4
-
1
-
-
-
-
-
-
Typ
-
-
3
-
-
0.13
-
2
2
2.5
-
Max
-
-
4
4.5
-
10
500
100
100
3.5
6.9
Unit
V
V
V
V
V
µA
µA
nA
nA
mΩ
mΩ
Static characteristics
V
GS(th)
total gate charge
gate-source charge
gate-drain charge
I
D
= 25 A; V
DS
= 32 V; V
GS
= 10 V;
T
j
= 25 °C;
Fig. 13; Fig. 14
-
-
-
49.4
13.5
16.2
-
-
-
nC
nC
nC
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved
Product data sheet
19 June 2015
5 / 13
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