EEWORLDEEWORLDEEWORLD

Part Number

Search

49FCT3805BQ

Description
Low Skew Clock Driver, FCT Series, 10 True Output(s), 0 Inverted Output(s), CMOS, PDSO20, QSOP-20
Categorylogic    logic   
File Size374KB,7 Pages
ManufacturerIDT (Integrated Device Technology)
Download Datasheet Parametric Compare View All

49FCT3805BQ Overview

Low Skew Clock Driver, FCT Series, 10 True Output(s), 0 Inverted Output(s), CMOS, PDSO20, QSOP-20

49FCT3805BQ Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerIDT (Integrated Device Technology)
Parts packaging codeQSOP
package instructionQSOP-20
Contacts20
Reach Compliance Codenot_compliant
seriesFCT
Input adjustmentSCHMITT TRIGGER
JESD-30 codeR-PDSO-G20
JESD-609 codee0
length8.6868 mm
Logic integrated circuit typeLOW SKEW CLOCK DRIVER
MaximumI(ol)0.024 A
Humidity sensitivity level1
Number of functions2
Number of inverted outputs
Number of terminals20
Actual output times10
Maximum operating temperature70 °C
Minimum operating temperature
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeSSOP
Encapsulate equivalent codeSSOP20,.25
Package shapeRECTANGULAR
Package formSMALL OUTLINE, SHRINK PITCH
power supply3.3 V
Prop。Delay @ Nom-Sup5 ns
propagation delay (tpd)5 ns
Certification statusNot Qualified
Same Edge Skew-Max(tskwd)0.5 ns
Maximum seat height1.722 mm
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)3 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn85Pb15)
Terminal formGULL WING
Terminal pitch0.635 mm
Terminal locationDUAL
width3.937 mm
IDT49FCT3805B
3.3V CMOS BUFFER/CLOCK DRIVER
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGE
3.3V CMOS
BUFFER/CLOCK DRIVER
IDT49FCT3805B
FEATURES:
DESCRIPTION:
0.5 MICRON CMOS Technology
Guaranteed low skew < 500ps (max.)
Very low duty cycle distortion < 1.0ns (max.)
Very low CMOS power levels
TTL compatible inputs and outputs
Inputs can be driven from 3.3V or 5V components
Two independent output banks with 3-state control
1:5 fanout per bank
"Heartbeat" monitor output
V
CC
= 3.3V ± 0.3V
Available in SSOP, SOIC, and QSOP packages
The FCT3805B is a 3.3 volt, non-inverting clock driver built using
advanced dual metal CMOS technology. The device consists of two banks
of drivers, each with a 1:5 fanout and its own output enable control. The
device has a "heartbeat" monitor for diagnostics and PLL driving. The
MON output is identical to all other outputs and complies with the output
specifications in this document. The FCT3805B offers low capacitance
inputs with hysteresis.
The FCT3805B is designed for high speed clock distribution where
signal quality and skew are critical. The FCT3805B also allows single
point-to-point transmission line driving in applications such as address
distribution, where one signal must be distributed to multiple recievers with
low skew and high signal quality.
For more information on using the FCT3805B with two different input
frequencies on bank A and B, please see AN-236.
FUNCTIONAL BLOCK DIAGRAM
OE
A
IN
A
5
OA
1
- OA
5
PIN CONFIGURATION
V
CCA
OA
1
OA
2
OA
3
GND
A
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
V
CCB
OB
1
OB
2
OB
3
GND
B
OB
4
OB
5
MON
OE
B
IN
B
IN
B
OE
B
5
OA
4
OB
1
- OB
5
OA
5
GND
Q
MON
OE
A
IN
A
SOIC/ SSOP/ QSOP
TOP VIEW
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGE
c
2005
Integrated Device Technology, Inc.
JUNE 2005
DSC 6879/-
1

49FCT3805BQ Related Products

49FCT3805BQ 49FCT3805BPY 49FCT3805BPYI 49FCT3805BSOI 49FCT3805BSO 49FCT3805BQI
Description Low Skew Clock Driver, FCT Series, 10 True Output(s), 0 Inverted Output(s), CMOS, PDSO20, QSOP-20 Low Skew Clock Driver, FCT Series, 10 True Output(s), 0 Inverted Output(s), CMOS, PDSO20, SSOP-20 Low Skew Clock Driver, FCT Series, 10 True Output(s), 0 Inverted Output(s), CMOS, PDSO20, SSOP-20 Low Skew Clock Driver, FCT Series, 10 True Output(s), 0 Inverted Output(s), CMOS, PDSO20, SOIC-20 Low Skew Clock Driver, FCT Series, 10 True Output(s), 0 Inverted Output(s), CMOS, PDSO20, SOIC-20 Low Skew Clock Driver, FCT Series, 10 True Output(s), 0 Inverted Output(s), CMOS, PDSO20, QSOP-20
Is it Rohs certified? incompatible incompatible incompatible incompatible incompatible incompatible
Maker IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology)
Parts packaging code QSOP SSOP SSOP SOIC SOIC QSOP
package instruction QSOP-20 SSOP-20 SSOP-20 SOIC-20 SOIC-20 QSOP-20
Contacts 20 20 20 20 20 20
Reach Compliance Code not_compliant not_compliant not_compliant not_compliant not_compliant not_compliant
series FCT FCT FCT FCT FCT FCT
Input adjustment SCHMITT TRIGGER SCHMITT TRIGGER SCHMITT TRIGGER SCHMITT TRIGGER SCHMITT TRIGGER SCHMITT TRIGGER
JESD-30 code R-PDSO-G20 R-PDSO-G20 R-PDSO-G20 R-PDSO-G20 R-PDSO-G20 R-PDSO-G20
JESD-609 code e0 e0 e0 e0 e0 e0
length 8.6868 mm 7.2 mm 7.2 mm 12.8 mm 12.8 mm 8.6868 mm
Logic integrated circuit type LOW SKEW CLOCK DRIVER LOW SKEW CLOCK DRIVER LOW SKEW CLOCK DRIVER LOW SKEW CLOCK DRIVER LOW SKEW CLOCK DRIVER LOW SKEW CLOCK DRIVER
MaximumI(ol) 0.024 A 0.024 A 0.024 A 0.024 A 0.024 A 0.024 A
Humidity sensitivity level 1 1 1 1 1 1
Number of functions 2 2 2 2 2 2
Number of terminals 20 20 20 20 20 20
Actual output times 10 10 10 10 10 10
Maximum operating temperature 70 °C 70 °C 85 °C 85 °C 70 °C 85 °C
Output characteristics 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code SSOP SSOP SSOP SOP SOP SSOP
Encapsulate equivalent code SSOP20,.25 SSOP20,.3 SSOP20,.3 SOP20,.4 SOP20,.4 SSOP20,.25
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE SMALL OUTLINE SMALL OUTLINE, SHRINK PITCH
power supply 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V
Prop。Delay @ Nom-Sup 5 ns 5 ns 5.2 ns 5.2 ns 5 ns 5.2 ns
propagation delay (tpd) 5 ns 5 ns 5.2 ns 5.2 ns 5 ns 5.2 ns
Certification status Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
Same Edge Skew-Max(tskwd) 0.5 ns 0.5 ns 0.6 ns 0.6 ns 0.5 ns 0.6 ns
Maximum seat height 1.722 mm 1.99 mm 1.99 mm 2.64 mm 2.64 mm 1.722 mm
Maximum supply voltage (Vsup) 3.6 V 3.6 V 3.6 V 3.6 V 3.6 V 3.6 V
Minimum supply voltage (Vsup) 3 V 3 V 3 V 3 V 3 V 3 V
Nominal supply voltage (Vsup) 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V
surface mount YES YES YES YES YES YES
technology CMOS CMOS CMOS CMOS CMOS CMOS
Temperature level COMMERCIAL COMMERCIAL INDUSTRIAL INDUSTRIAL COMMERCIAL INDUSTRIAL
Terminal surface Tin/Lead (Sn85Pb15) Tin/Lead (Sn85Pb15) Tin/Lead (Sn85Pb15) Tin/Lead (Sn85Pb15) Tin/Lead (Sn85Pb15) Tin/Lead (Sn85Pb15)
Terminal form GULL WING GULL WING GULL WING GULL WING GULL WING GULL WING
Terminal pitch 0.635 mm 0.65 mm 0.65 mm 1.27 mm 1.27 mm 0.635 mm
Terminal location DUAL DUAL DUAL DUAL DUAL DUAL
width 3.937 mm 5.3 mm 5.3 mm 7.5 mm 7.5 mm 3.937 mm
program
Game timer program 89C51...
wtt2279812460 DIY/Open Source Hardware
About the 485 communication of MSP430
I use two msp430f149 boards for 485 communication, one for sending and one for receiving. The host sends information, the slave can receive and display it, but the host cannot receive the information ...
mengyu139 Microcontroller MCU
Design of automobile panel mold for MFC modeling
4. Introducing the idea of parallel engineering in the design of automobile panel molds 4.1. The concept of parallel engineering Parallel engineering is a new product design and manufacturing model pr...
frozenviolet Automotive Electronics
Altium Designer v21.7.1.17
[i=s]This post was last edited by dcexpert on 2021-9-28 21:03[/i][hide]Baidu Netdisk: https://pan.baidu.com/s/1TcUbZxmKLPxMkMPM38g2XA Extraction code: am3t[/hide]...
dcexpert PCB Design
Which assembly file should reset run?
I learned from the forum that when the system is powered on, woken up from sleep, or the reset pin receives a valid signal, the system will first run the reset assembly program, which contains the met...
dorna Embedded System
Modify the link file address of the project
I would like to ask all the experts:Modify the FLASH address of the link file under the project to be non-zero. Under IAR's DEBUG, the simulation test using the same program is abnormal.Here are the s...
wbqq2008 Microcontroller MCU

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 424  1052  1984  1070  801  9  22  40  17  49 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号