EEWORLDEEWORLDEEWORLD

Part Number

Search

FTR-1-28-57-TM-D-LC-TR

Description
Board Connector
CategoryThe connector    The connector   
File Size255KB,2 Pages
ManufacturerSAMTEC
Websitehttp://www.samtec.com/
Download Datasheet Parametric View All

FTR-1-28-57-TM-D-LC-TR Overview

Board Connector

FTR-1-28-57-TM-D-LC-TR Parametric

Parameter NameAttribute value
MakerSAMTEC
Reach Compliance Codecompliant
ECCN codeEAR99
Connector typeBOARD CONNECTOR
Contact completed and terminatedMatte Tin (Sn)
JESD-609 codee3
REVISION AX
PATENT NUMBERS
5713755 / 5961339
FTR-1XX-XX-XX-D-XX-XX
No OF POSITIONS
-02 THRU -50
(PER ROW)
LEAD STYLE
SEE TABLE 1
DO NOT
SCALE FROM
THIS PRINT
(No OF POS x .050 [1.27]) +.002/-.010
[+.05/-.25]
02
100
SEE NOTE 4
.196 4.98
REF
.100 2.54
REF
01
.050 1.27 REF
99
HTMS-50-D
3 MAX SWAY
(EITHER DIRECTION)
PLATING SPECIFICATION
-G: 10µ" GOLD IN CONTACT AREA,
3µ" GOLD ON TAIL
-T: MATTE TIN CONTACT AND TAIL
(LEAD STYLES -01, -02, -03, -51, -52 ONLY)
-S: 30µ" SELECTIVE GOLD IN CONTACT AREA,
MATTE TIN ON TAIL
-F: 3µ" FLASH SELECTIVE GOLD IN CONTACT AREA,
MATTE TIN ON TAIL
-SM: 30µ" SELECTIVE GOLD IN CONTACT AREA,
MATTE TIN ON TAIL
-TM: MATTE TIN CONTACT AND TAIL
(LEAD STYLES -01, -02, -03, -51, -52 ONLY)
-FM: 3µ" FLASH SELECTIVE GOLD IN CONTACT AREA,
MATTE TIN ON TAIL
-H: 30µ" HEAVY GOLD IN CONTACT AREA,
3µ" GOLD ON TAIL
-L: 10µ" LIGHT SELECTIVE GOLD IN CONTACT AREA,
MATTE TIN ON TAIL
BODY SPECIFICATION
-D: DOUBLE (USE HTMS-50-D)
OPTION
-P: PICK & PLACE PAD
(USE PPP-22)
(SEE FIG 3, SHT 2)
[5 POS MIN]
-TR: TAPE AND REEL PACKAGING
(POSITIONS -02 THROUGH -50)
OPTION
-A: ALIGNMENT PIN (5 POS MIN)
( SEE FIG 2, SHT 2)
SAMTEC DISCRETION ON WHICH
-A PIN USED.
-LC: STAKED LOCKING CLIP (USE LC-05-TM)
(SEE FIG 4, SHT 2 & NOTE 10)
-XX: POLARIZING SPECIFICATION
XX INDICATES POS TO BE OMMITED
T-1M6-XX-XX-2
.018 0.46 SQ
REF
2 MAX SWAY
(EITHER DIRECTION)
2 MAX SWAY
(EITHER DIRECTION)
.050 1.27 (TYP)
(SEE NOTE 5)
C
CONTACT
AREA
"B"
90°
- 2°
(TYP)
.100 2.54
REF
C
C
+4°
.004 [.10]
.05 1.3
(SEE NOTE 7)
NOTES:
1.
C
REPRESENTS A CRITICAL DIMENSION.
2. MAXIMUM CUT FLASH: .010[.25].
3. MINIMUM PUSHOUT FORCE: 2 LB.
4. MAXIMUM PIN ROTATION IN BODY: 2°.
5. SHEAR TAILS TO DIMENSION SHOWN.
6. MAXIMUM BURR ALLOWANCE: .003[.08]
7. MEASURED AT BEND RADIUS.
8. TUBE POSITIONS -05 AND GREATER; LAYER
PACKAGE POSITIONS -02 THRU -04.
9. -P OPTION: TUBE POSITIONS -07 THRU -50;
ALL OTHERS, TAPE & REEL ONLY.
10. DUE TO HIGH AMOUNT OF INSERTION FORCE
NEEDED, THE -LC OPTION IS NOT COMPATIBLE
WITH AUTO PLACEMENT. SAMTEC RECOMENDS
MANUAL PLACEMENT FOR ALL ASSEMBLIES
WITH THE -LC OPTION.
FIG 1
FTR-1XX-XX-D SHOWN
.2960 7.518 REF
UNLESS OTHERWISE SPECIFIED,
DIMENSIONS ARE IN INCHES.
TOLERANCES ARE:
.X: .1 [2.5]
.XX: .01 [.3]
2
.XXX: .005 [.13]
.XXXX: .0020 [.051]
MATERIAL:
PROPRIETARY NOTE
THIS DOCUMENT CONTAINS INFORMATION
CONFIDENTIAL AND PROPRIETARY TO
SAMTEC, INC. AND SHALL NOT BE REPRODUCED
OR TRANSFERRED TO OTHER DOCUMENTS OR
DISCLOSED TO OTHERS OR USED FOR ANY
PURPOSE OTHER THAN THAT WHICH IT WAS
OBTAINED WITHOUT THE EXPRESSED WRITTEN
CONSENT OF SAMTEC, INC.
DECIMALS
ANGLES
520 PARK EAST BLVD, NEW ALBANY, IN 47150
PHONE: 812-944-6733
FAX: 812-948-5047
e-Mail info@SAMTEC.com
code 55322
DESCRIPTION:
DWG. NO.
DO NOT SCALE DRAWING
SHEET SCALE: 2:1
INSULATOR: LCP, UL 94 VO, COLOR: BLACK
TERMINAL: PHOS BRONZE
HI-TEMP TERMINAL MICRO-STRIP (DOUBLE ROW)
FTR-1XX-XX-XX-D-XX-XX
12/12/2000
SHEET
1
OF
2
F:\DWG\MISC\MKTG\FTR-1XX-XX-XX-D-XX-XX-MKT.SLDDRW
BY:
DEAN P
Show off the prizes you received
Show off the small prize I received today, a travel socket. This is a socket adapter. It feels pretty good. I can take it with me when I go out for repairs in the future....
yjtyjt Talking
How to compile the application into the wince kernel
I want to compile an application written in evc into the kernel. I have found two methods so far. One is to modify the configuration file and write my path and executable file under the module of the ...
cncdrawer Embedded System
[Xiao Meige SoC] How to view the number of GPIO added on the FPGA side of the SoC FPGA system and use interrupts
Xiao Mei has been working hard to systematically organize the development methods of Intel SoC FPGA. (YY self-entertainment). Problem Description: I was stuck for several years because of the interrup...
小梅哥 FPGA/CPLD
How do Android phones achieve media communication + USB flash drive recognition through a data line?
As the title says, I am a little confused about how Android phones can communicate with PCs using only one USB cable, and can also access the contents of a TF card in USB mode through a computer, with...
leekuip Linux and Android
Bootrom development help
I have a new job, which requires me to complete a SOC bootloader, but I don't know how to write the bootloader firmware part. Is there any expert who can give me some guidance on what needs to be done...
chl1999 ARM Technology
What are the two parts of RFID?
Radio frequency identification (RFID) technology is a contactless automatic identification technology. Its basic principle is to use radio frequency signals and their spatial coupling and transmission...
Jacktang Wireless Connectivity

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 1806  2726  59  1323  1209  37  55  2  27  25 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号