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BS616LV8016DCP70

Description
Standard SRAM, 512KX16, 70ns, CMOS, ROHS COMPLIANT PACKAGE
Categorystorage    storage   
File Size216KB，10 Pages
ManufacturerBrilliance
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BS616LV8016DCP70 Overview

Standard SRAM, 512KX16, 70ns, CMOS, ROHS COMPLIANT PACKAGE

BS616LV8016DCP70 Parametric

Parameter NameAttribute value
MakerBrilliance
Parts packaging codeDIE
package instructionDIE,
Reach Compliance Codeunknown
ECCN code3A991.B.2.A
Maximum access time70 ns
JESD-30 codeX-XUUC-N
memory density8388608 bit
Memory IC TypeSTANDARD SRAM
memory width16
Number of functions1
word count524288 words
character code512000
Operating modeASYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize512KX16
Package body materialUNSPECIFIED
encapsulated codeDIE
Package shapeUNSPECIFIED
Package formUNCASED CHIP
Parallel/SerialPARALLEL
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)2.7 V
Nominal supply voltage (Vsup)3 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal formNO LEAD
Terminal locationUPPER

BS616LV8016DCP70 Preview

Very Low Power CMOS SRAM
512K X 16 bit
Pb-Free and Green package materials are compliant to RoHS
BS616LV8016
FEATURES
Wide V
CC
operation voltage : 2.4V ~ 5.5V
Very low power consumption :
Operation current : 31mA (Max.) at 55ns
V
CC
= 3.0V
2mA (Max.) at 1MHz
O
Standby current : 4/8uA (Max.) at 70/85 C
Operation current : 76mA (Max.) at 55ns
V
CC
= 5.0V
10mA (Max.) at 1MHz
O
Standby current : 25/50uA (Max.) at 70/85 C
High speed access time :
-55
55ns(Max.) at V
CC
=3.0~5.5V
-70
70ns(Max.) at V
CC
=2.7~5.5V
Automatic power down when chip is deselected
Easy expansion with CE2, CE1 and OE options
I/O Configuration x8/x16 selectable by LB and UB pin.
Three state outputs and TTL compatible
Fully static operation, no clock, no refresh
Data retention supply voltage as low as 1.5V
DESCRIPTION
The BS616LV8016 is a high performance, very low power CMOS
Static Random Access Memory organized as 524,288 by 16 bits and
operates form a wide range of 2.4V to 5.5V supply voltage.
Advanced CMOS technology and circuit techniques provide both
high speed and low power features with maximum CMOS standby
current of 8/50uA at Vcc=3/5V at 85 C and maximum access time of
55/70ns.
Easy memory expansion is provided by an active LOW chip enable
(CE1), active HIGH chip enable (CE2) and active LOW output
enable (OE) and three-state output drivers.
The BS616LV8016 has an automatic power down feature, reducing
the power consumption significantly when chip is deselected.
The BS616LV8016 is available in DICE form and 48-ball BGA
package.
O
POWER CONSUMPTION
POWER DISSIPATION
PRODUCT
FAMILY
BS616LV8016DC
BS616LV8016FC
BS616LV8016FI
OPERATING
TEMPERATURE
Commercial
O
O
+0 C to +70 C
Industrial
O
O
-40 C to +85 C
STANDBY
(I
CCSB1
, Max)
Operating
(I
CC
, Max)
PKG TYPE
V
CC
=3.0V
10MHz
f
Max.
V
CC
=5.0V
V
CC
=3.0V
1MHz
V
CC
=5.0V
10MHz
f
Max.
1MHz
25uA
4.0uA
9mA
39mA
75mA
1.5mA
19mA
30mA
DICE
BGA-48-0912
BGA-48-0912
50uA
8.0uA
10mA
40mA
76mA
2mA
20mA
31mA
PIN CONFIGURATIONS
1
A
B
C
D
E
F
G
H
LB
DQ8
DQ9
VSS
VCC
DQ14
DQ15
A18
2
OE
UB
DQ10
DQ11
DQ12
DQ13
NC
A8
3
A0
A3
A5
A17
VSS
A14
A12
A9
4
A1
A4
A6
A7
A16
A15
A13
A10
5
A2
CE1
DQ1
DQ3
DQ4
DQ5
WE
A11
6
CE2
DQ0
DQ2
VCC
VSS
DQ6
DQ7
NC
BLOCK DIAGRAM
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
Address
Input
Buffer
10
Row
Decoder
1024
Memory Array
1024 x 8192
8192
DQ0
.
.
.
.
.
.
DQ15
CE2
CE1
WE
OE
UB
LB
V
CC
V
SS
.
.
.
.
.
.
16
16
Data
Input
Buffer
Data
Output
Buffer
16
512
Column Decoder
9
Address Input Buffer
Control
16
Column I/O
Write Driver
Sense Amp
A14 A15 A16 A17 A18 A0 A1 A2 A3
48-ball BGA top view
Brilliance Semiconductor, Inc.
reserves the right to change products and specifications without notice.
R0201-BS616LV8016
1
Revision
2.4
Oct.
2008
BS616LV8016
PIN DESCRIPTIONS
Name
A0-A18 Address Input
CE1 Chip Enable 1 Input
CE2 Chip Enable 2 Input
WE Write Enable Input
Function
These 19 address inputs select one of the 524,288 x 16 bit in the RAM
CE1 is active LOW and CE2 is active HIGH. Both chip enables must be active when
data read form or write to the device. If either chip enable is not active, the device is
deselected and is in standby power mode. The DQ pins will be in the high impedance
state when the device is deselected.
The write enable input is active LOW and controls read and write operations. With the
chip selected, when WE is HIGH and OE is LOW, output data will be present on the
DQ pins; when WE is LOW, the data present on the DQ pins will be written into the
selected memory location.
OE Output Enable Input
The output enable input is active LOW. If the output enable is active while the chip is
selected and the write enable is inactive, data will be present on the DQ pins and they
will be enabled. The DQ pins will be in the high impendence state when OE is inactive.
LB and UB Data Byte Control Input
DQ0-DQ15 Data Input/Output
Ports
V
CC
V
SS
Lower byte and upper byte data input/output control pins.
16 bi-directional ports are used to read data from or write data into the RAM.
Power Supply
Ground
TRUTH TABLE
MODE
Chip De-selected
(Power Down)
CE1
H
X
X
CE2
X
L
X
H
H
WE
X
X
X
H
H
OE
X
X
X
H
H
LB
X
X
H
L
X
L
UB
X
X
H
X
L
L
L
H
L
L
H
DQ0~DQ7 DQ8~DQ15 V
CC
CURRENT
High Z
High Z
High Z
High Z
High Z
D
OUT
High Z
D
OUT
D
IN
X
D
IN
High Z
High Z
High Z
High Z
High Z
D
OUT
D
OUT
High Z
D
IN
D
IN
X
I
CCSB
, I
CCSB1
I
CCSB
, I
CCSB1
I
CCSB
, I
CCSB1
I
CC
I
CC
I
CC
I
CC
I
CC
I
CC
I
CC
I
CC
Output Disabled
L
L
Read
L
H
H
L
H
L
L
Write
L
H
L
X
H
L
NOTES: H means V
IH
; L means V
IL
; X means don’t care (Must be V
IH
or V
IL
state)
R0201-BS616LV8016
2
Revision
2.4
Oct.
2008
BS616LV8016
ABSOLUTE MAXIMUM RATINGS
(1)
SYMBOL
V
TERM
T
BIAS
T
STG
P
T
I
OUT
OPERATING RANGE
UNITS
V
O
PARAMETER
Terminal Voltage with
Respect to GND
Temperature Under
Bias
Storage Temperature
Power Dissipation
DC Output Current
RATING
-0.5
(2)
RANG
Commercial
Industrial
AMBIENT
TEMPERATURE
0 C to + 70 C
-40 C to + 85 C
O
O
O
O
V
CC
2.4V ~ 5.5V
2.4V ~ 5.5V
to 7.0
-40 to +125
-60 to +150
1.0
20
C
C
O
W
mA
CAPACITANCE
(1)
(T
A
= 25
O
C, f = 1.0MHz)
SYMBOL PAMAMETER CONDITIONS MAX. UNITS
C
IN
C
IO
Input
Capacitance
Input/Output
Capacitance
V
IN
= 0V
V
I/O
= 0V
6
8
pF
pF
1. Stresses greater than those listed under ABSOLUTE
MAXIMUM RATINGS may cause permanent damage to the
device. This is a stress rating only and functional operation of
the device at these or any other conditions above those
indicated in the operational sections of this specification is not
implied. Exposure to absolute maximum rating conditions for
extended periods may affect reliability.
2. –2.0V in case of AC pulse width less than 30 ns.
1. This parameter is guaranteed and not 100% tested.
DC ELECTRICAL CHARACTERISTICS (T
A
= -40
O
C to +85
O
C)
PARAMETER
NAME
V
CC
V
IL
V
IH
I
IL
I
LO
V
OL
V
OH
I
CC
(5)
I
CC1
I
CCSB
I
CCSB1
(6)
PARAMETER
Power Supply
Input Low Voltage
TEST CONDITIONS
MIN.
2.4
-0.5
(2)
TYP.
(1)
--
--
MAX.
5.5
0.8
(3)
UNITS
V
V
Input High Voltage
V
IN
= 0V to V
CC
,
CE1 = V
IH
or CE2 = V
IL
V
I/O
= 0V to V
CC
,
CE1 = V
IH
or CE2 = V
IL
or OE = V
IH
V
CC
= Max, I
OL
= 2.0mA
V
CC
= Min, I
OH
= -1.0mA
CE1 = V
IL
and CE2 = V
IH
,
I
DQ
= 0mA, f = F
MAX
(4)
2.2
--
V
CC
+0.3
1
V
Input Leakage Current
--
--
uA
Output Leakage Current
--
--
1
uA
Output Low Voltage
--
--
0.4
V
Output High Voltage
Operating Power Supply
Current
Operating Power Supply
Current
Standby Current – TTL
2.4
V
CC
=3.0V
V
CC
=5.0V
V
CC
=3.0V
V
CC
=5.0V
V
CC
=3.0V
V
CC
=5.0V
V
CC
=3.0V
V
CC
=5.0V
--
--
31
76
2
10
1.0
2.0
8.0
50
V
--
--
mA
CE1 = V
IL
and CE2 = V
IH
,
I
DQ
= 0mA, f = 1MHz
CE1 = V
IH
, or CE2 = V
IL
,
I
DQ
= 0mA
CE1≧V
CC
-0.2V or CE2≦0.2V,
V
IN
≧V
CC
-0.2V or V
IN
≦0.2V
--
--
mA
--
--
0.8
3.5
mA
Standby Current – CMOS
O
--
uA
1. Typical characteristics are at T
A
=25 C and not 100% tested.
2. Undershoot: -1.0V in case of pulse width less than 20 ns.
3. Overshoot: V
CC
+1.0V in case of pulse width less than 20 ns.
4. F
MAX
=1/t
RC.
O
5. I
CC (MAX.)
is 30mA/75mA at V
CC
=3.0V/5.0V and T
A
=70 C.
O
6. I
CCSB1(MAX.)
is 4.0uA/25uA at V
CC
=3.0V/5.0V and T
A
=70 C.
R0201-BS616LV8016
3
Revision
2.4
Oct.
2008
BS616LV8016
DATA RETENTION CHARACTERISTICS (T
A
= -40
O
C to +85
O
C)
SYMBOL
V
DR
I
CCDR
(3)
t
CDR
t
R
PARAMETER
V
CC
for Data Retention
Data Retention Current
Chip Deselect to Data
Retention Time
Operation Recovery Time
O
TEST CONDITIONS
CE1≧V
CC
-0.2V or CE2≦0.2V,
V
IN
≧V
CC
-0.2V or V
IN
≦0.2V
CE1≧V
CC
-0.2V or CE2≦0.2V,
V
IN
≧V
CC
-0.2V or V
IN
≦0.2V
MIN.
1.5
TYP.
(1)
--
MAX.
--
UNITS
V
--
0.4
4.0
uA
0
See Retention Waveform
t
RC
(2)
--
--
ns
--
--
ns
1. V
CC
=1.5V, T
A
=25 C and not 100% tested.
2. t
RC
= Read Cycle Time.
O
3. I
CCDR(Max.)
is 2.0uA at T
A
=70 C.
LOW V
CC
DATA RETENTION WAVEFORM (1) (CE1 Controlled)
Data Retention Mode
V
DR
≧1.5V
V
CC
V
CC
V
CC
t
CDR
V
IH
CE1≧V
CC
- 0.2V
t
R
V
IH
CE1
LOW V
CC
DATA RETENTION WAVEFORM (2) (CE2 Controlled)
Data Retention Mode
V
CC
V
CC
V
DR
≧1.5V
V
CC
t
CDR
CE2≦0.2V
t
R
CE2
V
IL
V
IL
AC TEST CONDITIONS
(Test Load and Input/Output Reference)
Input Pulse Levels
Input Rise and Fall Times
Input and Output Timing
Reference Level
Output Load
t
CLZ
, t
OLZ
, t
CHZ
, t
OHZ
, t
WHZ
Others
Vcc / 0V
1V/ns
0.5Vcc
C
L
= 5pF+1TTL
C
L
= 30pF+1TTL
ALL INPUT PULSES
1 TTL
Output
C
(1)
L
KEY TO SWITCHING WAVEFORMS
WAVEFORM
INPUTS
MUST BE
STEADY
MAY CHANGE
FROM “H” TO “L”
MAY CHANGE
FROM “L” TO “H”
DON’T CARE
ANY CHANGE
PERMITTED
DOES NOT
APPLY
OUTPUTS
MUST BE
STEADY
WILL BE CHANGE
FROM “H” TO “L”
WILL BE CHANGE
FROM “L” TO “H”
CHANGE :
STATE UNKNOW
CENTER LINE IS
HIGH INPEDANCE
“OFF” STATE
V
CC
GND
10%
90%
90%
10%
→ ←
Rise Time:
1V/ns
→ ←
Fall Time:
1V/ns
1. Including jig and scope capacitance.
R0201-BS616LV8016
4
Revision
2.4
Oct.
2008
BS616LV8016
AC ELECTRICAL CHARACTERISTICS (T
A
= -40
O
C to +85
O
C)
READ CYCLE
JEDEC
PARANETER
PARAMETER
NAME
NAME
DESCRIPTION
Read Cycle Time
Address Access Time
Chip Select Access Time
Chip Select Access Time
Data Byte Control Access Time
Output Enable to Output Valid
Chip Select to Output Low Z
Chip Select to Output Low Z
Data Byte Control to Output Low Z
Output Enable to Output Low Z
Chip Select to Output High Z
Chip Select to Output High Z
(CE1)
(CE2)
(CE1)
(CE2)
(LB, UB)
(CE1)
(CE2)
(LB, UB)
CYCLE TIME : 55ns
(V
CC
=3.0~5.5V)
MIN.
55
--
--
--
--
--
10
10
10
5
--
--
--
--
10
TYP.
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
MAX.
--
55
55
55
55
30
--
--
--
--
30
30
30
25
--
CYCLE TIME : 70ns
(V
CC
=2.7~5.5V)
MIN.
70
--
--
--
--
--
10
10
10
5
--
--
--
--
10
TYP.
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
MAX.
--
70
70
70
70
35
--
--
--
--
35
35
35
30
--
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
UNITS
t
AVAX
t
AVQX
t
ELQV
t
ELQV
t
BLQV
t
GLQV
t
ELQX
t
ELQX
t
BLQX
t
GLQX
t
EHQZ
t
EHQZ
t
BHQZ
t
GHQZ
t
AVQX
t
RC
t
AA
t
ACS1
t
ACS2
t
BA
t
OE
t
CLZ1
t
CLZ2
t
BE
t
OLZ
t
CHZ1
t
CHZ2
t
BDO
t
OHZ
t
OH
Data Byte Control to Output High Z (LB, UB)
Output Enable to Output High Z
Data Hold from Address Change
SWITCHING WAVEFORMS (READ CYCLE)
READ CYCLE 1
(1,2,4)
t
RC
ADDRESS
t
OH
D
OUT
t
AA
t
OH
R0201-BS616LV8016
5
Revision
2.4
Oct.
2008
More (Only the first 5 pages are displayed. Please Download Datasheet to view the full content.) >

BS616LV8016DCP70 Related Products

BS616LV8016DCP70 BS616LV8016DCG55 BS616LV8016DCG70 BS616LV8016DCP55
Description Standard SRAM, 512KX16, 70ns, CMOS, ROHS COMPLIANT PACKAGE Standard SRAM, 512KX16, 55ns, CMOS, GREEN PACKAGE Standard SRAM, 512KX16, 70ns, CMOS, GREEN PACKAGE Standard SRAM, 512KX16, 55ns, CMOS, ROHS COMPLIANT PACKAGE
Maker Brilliance Brilliance Brilliance Brilliance
Parts packaging code DIE DIE DIE DIE
package instruction DIE, DIE, DIE, DIE,
Reach Compliance Code unknown unknown unknown unknown
ECCN code 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A
Maximum access time 70 ns 55 ns 70 ns 55 ns
JESD-30 code X-XUUC-N X-XUUC-N X-XUUC-N X-XUUC-N
memory density 8388608 bit 8388608 bit 8388608 bit 8388608 bit
Memory IC Type STANDARD SRAM STANDARD SRAM STANDARD SRAM STANDARD SRAM
memory width 16 16 16 16
Number of functions 1 1 1 1
word count 524288 words 524288 words 524288 words 524288 words
character code 512000 512000 512000 512000
Operating mode ASYNCHRONOUS ASYNCHRONOUS ASYNCHRONOUS ASYNCHRONOUS
Maximum operating temperature 70 °C 70 °C 70 °C 70 °C
organize 512KX16 512KX16 512KX16 512KX16
Package body material UNSPECIFIED UNSPECIFIED UNSPECIFIED UNSPECIFIED
encapsulated code DIE DIE DIE DIE
Package shape UNSPECIFIED UNSPECIFIED UNSPECIFIED UNSPECIFIED
Package form UNCASED CHIP UNCASED CHIP UNCASED CHIP UNCASED CHIP
Parallel/Serial PARALLEL PARALLEL PARALLEL PARALLEL
Maximum supply voltage (Vsup) 5.5 V 5.5 V 5.5 V 5.5 V
Minimum supply voltage (Vsup) 2.7 V 3 V 2.7 V 3 V
Nominal supply voltage (Vsup) 3 V 5 V 3 V 5 V
surface mount YES YES YES YES
technology CMOS CMOS CMOS CMOS
Temperature level COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL
Terminal form NO LEAD NO LEAD NO LEAD NO LEAD
Terminal location UPPER UPPER UPPER UPPER

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Shortcut:   A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

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