Features
•
Fast Read Access Time – 70 ns
•
Low Power CMOS Operation
– 100 µA Max Standby
– 30 mA Max Active at 5 MHz
JEDEC Standard Packages
– 32-lead PDIP
– 32-lead PLCC
– 32-lead TSOP
5V
±
10% Supply
High Reliability CMOS Technology
– 2000V ESD Protection
– 200 mA Latchup Immunity
Rapid Programming Algorithm – 100 µs/Byte (Typical)
CMOS and TTL Compatible Inputs and Outputs
Industrial Temperature Range
Green (Pb/Halide-free) Packaging Option
•
•
•
•
•
•
•
4-Megabit
(512K x 8)
OTP EPROM
AT27C040
1. Description
The AT27C040 chip is a low-power, high-performance, 4,194,304-bit one-time pro-
grammable read-only memory (OTP EPROM) organized as 512K by 8 bits. The
AT27C040 requires only one 5V power supply in normal read mode operation. Any
byte can be accessed in less than 70 ns, eliminating the need for speed reducing
WAIT states on high-performance microprocessor systems.
Atmel’s scaled CMOS technology provides low active power consumption, and fast
programming. Power consumption is typically 8 mA in active mode and less than
10
µA
in standby mode.
The AT27C040 is available in a choice of industry-standard JEDEC-approved one-
time programmable (OTP) plastic PDIP, PLCC and TSOP packages. The device fea-
tures two-line control (CE, OE) to eliminate bus contention in high-speed systems.
Atmel’s AT27C040 has additional features to ensure high quality and efficient produc-
tion use. The Rapid Programming Algorithm reduces the time required to program the
part and guarantees reliable programming. Programming time is typically only
100
µs/byte.
The Integrated Product Identification Code electronically identifies the
device and manufacturer. This feature is used by industry-standard programming
equipment to select the proper programming algorithms and voltages.
0189H–EPROM–12/07
2. Pin Configurations
Pin Name
A0 - A18
O0 - O7
CE
OE
Function
Addresses
Outputs
Chip Enable
Output Enable
2.1
32-lead PDIP Top View
VPP
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
O0
O1
O2
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
VCC
A18
A17
A14
A13
A8
A9
A11
OE
A10
CE
07
06
05
04
03
2.3
32-lead PLCC Top View
A12
A15
A16
VPP
VCC
A18
A17
2.2
32-lead TSOP Top View
A11
A9
A8
A13
A14
A17
A18
VCC
VPP
A16
A15
A12
A7
A6
A5
A4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
OE
A10
CE
07
06
05
04
03
GND
02
01
O0
A0
A1
A2
A3
2
AT27C040
0189H–EPROM–12/07
01
02
GND
03
04
05
06
14
15
16
17
18
19
20
A7
A6
A5
A4
A3
A2
A1
A0
O0
5
6
7
8
9
10
11
12
13
4
3
2
1
32
31
30
29
28
27
26
25
24
23
22
21
A14
A13
A8
A9
A11
OE
A10
CE
07
AT27C040
3. Switching Considerations
Switching between active and standby conditions via the Chip Enable pin may produce tran-
sient voltage excursions. Unless accommodated by the system design, these transients may
exceed datasheet limits, resulting in device non-conformance. At a minimum, a 0.1
µF
high
frequency, low inherent inductance, ceramic capacitor should be utilized for each device. This
capacitor should be connected between the V
CC
and Ground terminals of the device, as close
to the device as possible. Additionally, to stabilize the supply voltage level on printed circuit
boards with large EPROM arrays, a 4.7 µF bulk electrolytic capacitor should be utilized, again
connected between the V
CC
and Ground terminals. This capacitor should be positioned as
close as possible to the point where the power supply is connected to the array.
4. Block Diagram
5. Absolute Maximum Ratings*
Temperature Under Bias................................ -55°C to +125°C
Storage Temperature ..................................... -65°C to +150°C
Voltage on Any Pin with
Respect to Ground ............................................-2.0V to +7.0V
Voltage on A9 with
Respect to Ground .........................................-2.0V to +14.0V
V
PP
Supply Voltage with
Respect to Ground ..........................................-2.0V to +14.0V
*NOTICE:
Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent dam-
age to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect
device reliability.
3
0189H–EPROM–12/07
6. Operating Modes
Mode/Pin
Read
Output Disable
Standby
Rapid Program
(2)
PGM Verify
PGM Inhibit
Product Identification
(4)
Notes:
1. X can be V
IL
or V
IH
.
2. Refer to Programming Characteristics
3. V
H
= 12.0 ± 0.5V.
4. Two identifier bytes may be selected. All Ai inputs are held low (V
IL
), except A9 which is set to V
H
and A0 which is toggled
low (V
IL
) to select the Manufacturer’s Identification byte and high (V
IH
) to select the Device Code byte.
CE
V
IL
X
V
IH
V
IL
X
V
IH
V
IL
OE
V
IL
V
IH
X
V
IH
V
IL
V
IH
V
IL
Ai
Ai
X
X
Ai
Ai
X
A9 = V
H(3)
A0 = V
IH
or V
IL
A1 - A18 = V
IL
V
PP
X
(1)
X
X
V
PP
V
PP
V
PP
X
Outputs
D
OUT
High Z
High Z
D
IN
D
OUT
High Z
Identification Code
7. DC and AC Operating Conditions for Read Operation
AT27C040-70
Industrial Operating Temperature (Case)
V
CC
Power Supply
-40°C - 85°C
5V
±
10%
AT27C040-90
-40°C - 85°C
5V
±
10%
8. DC and Operating Characteristics for Read Operation
Symbol
I
LI
I
LO
I
PP1(2)
I
SB
I
CC
V
IL
V
IH
V
OL
V
OH
Notes:
Parameter
Input Load Current
Output Leakage Current
V
PP(1)
Read/Standby Current
V
CC1(1)
Standby Current
V
CC
Active Current
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage
I
OL
= 2.1 mA
I
OH
= -400 µA
2.4
Condition
V
IN
= 0V to V
CC
V
OUT
= 0V to V
CC
V
PP
= V
CC
I
SB1
(CMOS), CE = V
CC
±
0.3V
I
SB2
(TTL), CE = 2.0 to V
CC
+ 0.5V
f = 5 MHz, I
OUT
= 0 mA, CE = V
IL
-0.6
2.0
Min
Max
±1
±5
10
100
1
30
0.8
V
CC
+ 0.5
0.4
Units
µA
µA
µA
µA
mA
mA
V
V
V
V
1. V
CC
must be applied simultaneously or before V
PP
, and removed simultaneously or after V
PP
.
2. V
PP
may be connected directly to V
CC
, except during programming. The supply current would then be the sum of I
CC
and I
PP
.
4
AT27C040
0189H–EPROM–12/07
AT27C040
9. AC Characteristics for Read Operation
AT27C040
-70
Symbol
t
ACC(1)
t
CE(1)
t
OE(1)
t
DF(1)
t
OH
Note:
Parameter
Address to Output Delay
CE to Output Delay
OE to Output Delay
Condition
CE = OE
= V
IL
OE = V
IL
CE = V
IL
Min
Max
70
70
30
20
0
0
Min
-90
Max
90
90
35
20
Units
ns
ns
ns
ns
ns
OE or CE High to Output Float, Whichever Occurred First
Output Hold from Address, CE or OE, Whichever Occurred
First
1. See AC Waveforms for Read Operation
10. AC Waveforms for Read Operation
(1)
Notes:
1. Timing measurement references are 0.8V and 2.0V. Input AC drive levels are 0.45V and 2.4V, unless otherwise specified.
2. OE may be delayed up to t
CE
- t
OE
after the falling edge of CE without impact on t
CE
.
3. OE may be delayed up to t
ACC
- t
OE
after the address is valid without impact on t
ACC
.
4. This parameter is only sampled and is not 100% tested.
5. Output float is defined as the point when data is no longer driven.
5
0189H–EPROM–12/07
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