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P4C1281-45PM

Description
ULTRA HIGH SPEED 64K X 4 cmos STATIC RAMS
Categorystorage    storage   
File Size737KB,11 Pages
ManufacturerPyramid Semiconductor Corporation
Websitehttp://www.pyramidsemiconductor.com/
Download Datasheet Parametric View All

P4C1281-45PM Overview

ULTRA HIGH SPEED 64K X 4 cmos STATIC RAMS

P4C1281-45PM Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerPyramid Semiconductor Corporation
Parts packaging codeDIP
package instructionDIP,
Contacts28
Reach Compliance Codecompli
ECCN code3A001.A.2.C
Maximum access time45 ns
JESD-30 codeR-PDIP-T28
JESD-609 codee0
length34.861 mm
memory density262144 bi
Memory IC TypeSTANDARD SRAM
memory width4
Number of functions1
Number of terminals28
word count65536 words
character code64000
Operating modeSYNCHRONOUS
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
organize64KX4
Package body materialPLASTIC/EPOXY
encapsulated codeDIP
Package shapeRECTANGULAR
Package formIN-LINE
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Certification statusNot Qualified
Maximum seat height5.334 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountNO
technologyCMOS
Temperature levelMILITARY
Terminal surfaceTIN LEAD
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width7.62 mm
P4C1281/P4C1282
ULTRA HIGH SPEED 64K X 4
cmoS STATIc RAmS
FEATURES
Full CMOS, 6T Cell
High Speed (Equal Access and Cycle Times)
– 12/15/20/25 ns (Commercial)
– 15/20/25/35 ns (Industrial)
– 20/25/35/45 ns (Military)
Low Power Operation
5V ± 10% Power Supply
Separate Inputs and Outputs
– P4C1281 Input Data at Outputs during Write
– P4C1282 Outputs in High Z during Write
Fully TTL Compatible Inputs and Outputs
Standard Pinout (JEDEC Approved)
– 28-Pin 300 mil DIP, SOJ
– 28-Pin 350 x 550 mil LCC
DESCRIPTIOn
The P4C1281 and P4C1282 are 262,144-bit (64Kx4) ultra
high-speed static RAMs similar to the P4C1258, but with
separate data I/O pins. The P4C1281 features a transpar-
ent write operation; the outputs of the P4C1282 are in high
impedance during the write cycle. The RAMs operate from
a single 5V ± 10% tolerance power supply.
Access times as fast as 12 nanoseconds are available,
permitting greatly enhanced system operating speeds.
CMOS is used to reduce power consumption.
The P4C1281 and P4C1282 are available in 28-pin 300
mil DIP and SOJ, and a 28-pin 350x550 mil LCC providing
excellent board level densities.
FUnCTIOnAL BLOCk DIAgRAM
PIn COnFIgURATIOnS
DIP (P5, C5, D5-2), SOJ (J5)
LCC (L5)
Document #
SRAM136
REV OR
Revised July 2009
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