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P4C423-15CC

Description
HIGH SPEED 256 x 4 STATIC CMOS RAM
Categorystorage    storage   
File Size164KB,8 Pages
ManufacturerPyramid Semiconductor Corporation
Websitehttp://www.pyramidsemiconductor.com/
Download Datasheet Parametric View All

P4C423-15CC Overview

HIGH SPEED 256 x 4 STATIC CMOS RAM

P4C423-15CC Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerPyramid Semiconductor Corporation
Parts packaging codeDIP
package instruction0.300 INCH, SIDE BRAZED, CERAMIC, DIP-24
Contacts24
Reach Compliance Codecompli
ECCN codeEAR99
Maximum access time15 ns
JESD-30 codeR-CDIP-T24
JESD-609 codee0
memory density1024 bi
Memory IC TypeSTANDARD SRAM
memory width4
Number of functions1
Number of terminals24
word count256 words
character code256
Operating modeASYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize256X4
Package body materialCERAMIC, METAL-SEALED COFIRED
encapsulated codeDIP
Package shapeRECTANGULAR
Package formIN-LINE
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Certification statusNot Qualified
Maximum seat height5.08 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountNO
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceTIN LEAD
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width7.62 mm
P4C423
HIGH SPEED 256 x 4
STATIC CMOS RAM
FEATURES
High Speed (Equal Access and Cycle Times)
– 10/12/15/20/25/35 ns (Commercial)
– 15/20/25/35 ns (Military)
CMOS for Low Power
– 495 mW Max. – 10/12/15/20/25 (Commercial)
– 495 mW Max. – 15/20/25/35 (Military)
Single 5V±10% Power Supply
Separate I/O
Fully TTL Compatible Inputs and Outputs
Resistant to single event upset and latchup
resulting from advanced process and design
improvements
Standard 24-pin 300 mil DIP package.
DESCRIPTION
The P4C423 is a 1,024-bit high-speed (10ns) Static
RAM with a 256 x 4 organization. The memory requires
no clocks or refreshing and has equal access and cycle
times. Inputs and outputs are fully TTL compatible.
Operation is from a single 5 Volt supply. Easy memory
expansion is provided by an active LOW chip select one
(CS
1
) and active HIGH chip select two (CS
2
) as well as
3-state outputs.
In addition to high performance and high density, the
device features latch-up protection, single event and
upset protection. The P4C423 is offered in a 24-pin 300
mil DIP. Devices are offered in both commercial and
military temperature ranges.
FUNCTIONAL BLOCK DIAGRAM
PIN CONFIGURATION
DIP (C4)
Document #
SRAM108
REV OR
1
Revised October 2005
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