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8523CGIT

Description
Clock Driver, 8523 Series, 4 True Output(s), 0 Inverted Output(s), PDSO20
Categorylogic    logic   
File Size2MB,18 Pages
ManufacturerRenesas Electronics Corporation
Websitehttps://www.renesas.com/
Download Datasheet Parametric Compare View All

8523CGIT Overview

Clock Driver, 8523 Series, 4 True Output(s), 0 Inverted Output(s), PDSO20

8523CGIT Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerRenesas Electronics Corporation
package instructionTSSOP, TSSOP20,.25
Reach Compliance Codenot_compliant
series8523
Input adjustmentDIFFERENTIAL MUX
JESD-30 codeR-PDSO-G20
JESD-609 codee0
length6.5 mm
Logic integrated circuit typeCLOCK DRIVER
Humidity sensitivity level1
Number of functions1
Number of inverted outputs
Number of terminals20
Actual output times4
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Encapsulate equivalent codeTSSOP20,.25
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)225
power supply3.3 V
Prop。Delay @ Nom-Sup1.6 ns
propagation delay (tpd)1.6 ns
Certification statusNot Qualified
Same Edge Skew-Max(tskwd)0.05 ns
Maximum seat height1.2 mm
Maximum supply voltage (Vsup)3.465 V
Minimum supply voltage (Vsup)3.135 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
Temperature levelINDUSTRIAL
Terminal surfaceTin/Lead (Sn85Pb15)
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationDUAL
Maximum time at peak reflow temperature30
width4.4 mm
minfmax650 MHz
Low Skew, 1-to-4, Differential-to-HSTL
Fantout Buffer
ICS8523I
DATA SHEET
General Description
The ICS8523I is a low skew, high performance 1-to-4
Differential-to-HSTL Fanout Buffer. The ICS8523I has two selectable
clock inputs. The CLK, nCLK pair can accept most standard
differential input levels. The PCLK, nPCLK pair can accept LVPECL,
CML, or SSTL input levels. The clock enable is internally
synchronized to eliminate runt pulses on the outputs during
asynchronous assertion/deassertion of the clock enable pin.
Guaranteed output and part-to-part skew characteristics make the
ICS8523I ideal for those applications demanding well defined
performance and repeatability.
Features
Four differential HSTL compatible outputs
Selectable differential CLK, nCLK or LVPECL clock inputs
CLK, nCLK pair can accept the following differential input levels:
LVPECL, LVDS, HSTL, HCSL, SSTL
PCLK, nPCLK pair can accept the following differential input
levels: LVPECL, CML, SSTL
Maximum output frequency: 650MHz
Translates any single-ended input signal to HSTL levels with
resistor bias on nCLK input
Additive phase jitter, RMS: 0.082ps (typical), 100MHz f
OUT
Additive phase jitter, RMS: 0.190ps (typical), 120MHz f
OUT
Output skew: 50ps (maximum)
Part-to-part skew: 250ps (maximum)
Propagation delay: 1.6ns (maximum)
3.3V core, 1.8V output operating supply
-40°C to 85°C ambient operating temperature
Available in both standard (RoHS 5) and lead-free (RoHS 6)
packages
Block Diagram
CLK_EN
Pullup
D
Q
CLK
Pulldown
nCLK
Pullup
PCLK
Pulldown
nPCLK
Pullup
CLK_SEL
Pulldown
LE
0
1
Q1
nQ1
Q2
nQ2
Q3
nQ3
Q0
nQ0
Pin Assignment
GND
CLK_EN
CLK_SEL
CLK
nCLK
PCLK
nPCLK
nc
nc
V
DD
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
Q0
nQ0
V
DDO
Q1
nQ1
Q2
nQ2
V
DDO
Q3
nQ3
ICS8523I
20-Lead TSSOP
6.5mm x 4.4mm x 0.925mm package body
G Package
Top View
ICS8523CGI REVISION E JANUARY 21, 2011
1
©2011 Integrated Device Technology, Inc.

8523CGIT Related Products

8523CGIT 8523CGI
Description Clock Driver, 8523 Series, 4 True Output(s), 0 Inverted Output(s), PDSO20 Clock Driver, 8523 Series, 4 True Output(s), 0 Inverted Output(s), PDSO20
Is it Rohs certified? incompatible incompatible
Maker Renesas Electronics Corporation Renesas Electronics Corporation
package instruction TSSOP, TSSOP20,.25 TSSOP, TSSOP20,.25
Reach Compliance Code not_compliant not_compliant
series 8523 8523
Input adjustment DIFFERENTIAL MUX DIFFERENTIAL MUX
JESD-30 code R-PDSO-G20 R-PDSO-G20
JESD-609 code e0 e0
length 6.5 mm 6.5 mm
Logic integrated circuit type CLOCK DRIVER CLOCK DRIVER
Humidity sensitivity level 1 1
Number of functions 1 1
Number of terminals 20 20
Actual output times 4 4
Maximum operating temperature 85 °C 85 °C
Minimum operating temperature -40 °C -40 °C
Package body material PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code TSSOP TSSOP
Encapsulate equivalent code TSSOP20,.25 TSSOP20,.25
Package shape RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius) 225 225
power supply 3.3 V 3.3 V
Prop。Delay @ Nom-Sup 1.6 ns 1.6 ns
propagation delay (tpd) 1.6 ns 1.6 ns
Certification status Not Qualified Not Qualified
Same Edge Skew-Max(tskwd) 0.05 ns 0.05 ns
Maximum seat height 1.2 mm 1.2 mm
Maximum supply voltage (Vsup) 3.465 V 3.465 V
Minimum supply voltage (Vsup) 3.135 V 3.135 V
Nominal supply voltage (Vsup) 3.3 V 3.3 V
surface mount YES YES
Temperature level INDUSTRIAL INDUSTRIAL
Terminal surface Tin/Lead (Sn85Pb15) Tin/Lead (Sn85Pb15)
Terminal form GULL WING GULL WING
Terminal pitch 0.65 mm 0.65 mm
Terminal location DUAL DUAL
Maximum time at peak reflow temperature 30 30
width 4.4 mm 4.4 mm
minfmax 650 MHz 650 MHz
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