2757 is an 18-bit multiplying parallel-input, cur-
rent-output digital-to-analog converter that provides full 18-
bit performance—INL and DNL of ±1LSB maximum—over
temperature without any adjustments. 18-bit monotonicity
is guaranteed in all performance grades. This SoftSpan™
DAC operates from a single 3V to 5V supply and offers
six output ranges (up to ±10V) that can be programmed
through the parallel interface or pin-strapped for operation
in a single range.
In addition to its precision DC specifications, the LTC2757
also offers excellent AC specifications, including 2.1μs
full-scale settling to 1LSB and 1.4nV
•
s glitch impulse.
The LTC2757 uses a bidirectional input/output parallel
interface that allows readback of any on-chip register,
including DAC output-range settings; and a
CLR
pin and
power-on reset circuit that each reset the DAC output to
0V regardless of output range.
L,
LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. SoftSpan is a trademark of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
Maximum 18-Bit INL Error: ±1 LSB Over Temperature
Program or Pin-Strap Six Output Ranges:
0V to 5V, 0V to 10V, –2.5V to 7.5V, ±2.5V, ±5V, ±10V
Guaranteed Monotonic Over Temperature
Low Glitch Impulse 1.4nV
•
s (3V), 3nV
•
s (5V)
18-Bit Settling Time: 2.1μs
2.7V to 5.5V Single Supply Operation
Reference Current Constant for All Codes
Voltage-Controlled Offset and Gain Trims
Parallel Interface with Readback of All Registers
Clear and Power-On-Reset to 0V Regardless of
Output Range
48-Pin 7mm
×
7mm LQFP Package
APPLICATIONS
n
n
n
n
Instrumentation
Medical Devices
Automatic Test Equipment
Process Control and Industrial Automation
TYPICAL APPLICATION
18-Bit Voltage Output DAC with Software-Selectable Ranges
REF
5V
1.0
LTC2757 Integral Nonlinearity
±10V RANGE
0.8
+
LT1012
0.6
0.4
INL (LSB)
27pF
I
OUT1
150pF
0.2
0
–0.2
–0.4
–0.6
90°C
25°C
–45°C
0
65536
131072
CODE
196608
262143
2757 TA01b
–
R
IN
R
COM
REF
R
OFS
R
FB
WR
UPD
READ
D/S
CLR
WR
UPD
READ
D/S
CLR
M-SPAN
GAIN
ADJUST
LTC2757
18-BIT DAC WITH SPAN SELECT
GND
V
DD
0.1μF
2757 TA01
GE
ADJ
SPAN I/O
S2-S0
DATA I/O
D17-D0
V
OSADJ
OFFSET
ADJUST
2757f
+
5V
I
OUT2
–
LT1468
V
OUT
–0.8
–1.0
1
LTC2757
ABSOLUTE MAXIMUM RATINGS
(Notes 1, 2)
PIN CONFIGURATION
TOP VIEW
GE
ADJ
R
COM
REF
REF
R
OFS
R
OFS
R
FB
R
FB
I
OUT1
V
OSADJ
S1
S0
48
47
46
45
44
43
42
41
40
39
38
37
I
OUT1
, I
OUT2
, R
COM
to GND .....................................±0.3V
R
FB
, R
OFS
, R
IN
, REF, V
OSADJ
, GE
ADJ
to GND ........... ±15V
V
DD
to GND .................................................. –0.3V to 7V
S2, S1, S0,
D17-D0 to GND ............... –0.3V to V
DD
+ 0.3V (7V Max)
WR,
UPD,
D/S,
READ,
M-SPAN,
CLR
to GND .................................. –0.3V to 7V
Operating Temperature Range
LTC2757C .................................................... 0°C to 70°C
LTC2757I..................................................–40°C to 85°C
Maximum Junction Temperature .......................... 150°C
Storage Temperature Range .................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec)................... 300°C
1
2
3
4
I
OUT2S
5
I
OUT2F
6
GND 7
D17 8
D16 9
D15 10
D14 11
D13 12
R
IN
R
IN
S2
GND
36
35
34
33
32
31
30
29
28
27
26
25
WR
UPD
READ
D/S
DNC
D0
D1
D2
D3
D4
D5
D6
LX PACKAGE
48-LEAD (7mm 7mm) PLASTIC LQFP
T
JMAX
= 150°C,
θ
JA
= 53°C/W
ORDER INFORMATION
LEAD FREE FINISH
LTC2757BCLX#PBF
LTC2757BILX#PBF
LTC2757ACLX#PBF
LTC2757AILX#PBF
PART MARKING*
LTC2757LX
LTC2757LX
LTC2757LX
LTC2757LX
PACKAGE DESCRIPTION
48-Lead (7mm
×
7mm) Plastic LQFP
48-Lead (7mm
×
7mm) Plastic LQFP
48-Lead (7mm
×
7mm) Plastic LQFP
48-Lead (7mm
×
7mm) Plastic LQFP
TEMPERATURE RANGE
0°C to 70°C
–40°C to 85°C
0°C to 70°C
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to:
http://www.linear.com/leadfree/
This product is only offered in trays. For more information go to:
http://www.linear.com/packaging/
D12 13
D11 14
D10 15
D9 16
V
DD
17
GND 18
GND 19
CLR
20
M-SPAN 21
DNC 22
D8 23
D7 24
2757f
2
LTC2757
ELECTRICAL CHARACTERISTICS
SYMBOL
PARAMETER
Resolution
Monotonicity
DNL
INL
GE
GE
TC
BZE
BZS
TC
PSR
I
LKG
Differential Nonlinearity
Integral Nonlinearity
Gain Error
Gain Error Temperature Coefficient
Bipolar Zero Error
Bipolar Zero Temperature Coefficient
Power Supply Rejection
I
OUT1
Leakage Current
GE
ADJ
: 0V, All Output Ranges
(Note 3)
All Bipolar Ranges
(Note 3)
V
DD
= 5V, ±10%
V
DD
= 3V, ±10%
T
A
= 25°C
T
MIN
to T
MAX
l
l
l
l
V
DD
= 5V, V(R
IN
) = 5V unless otherwise specified. The
l
denotes the
specifications which apply over the full operating temperature range, otherwise specifications are at T
A
= 25°C.
LTC2757B
CONDITIONS
l
l
l
l
l
LTC2757A
MAX
MIN
18
18
±1
±2
±48
±0.4
±0.4
±5
±0.25
±36
±3
±0.15
±1.6
±4
±0.15
±0.4
±0.05
±0.8
±2
±2
±5
±24
±1
±1
±32
TYP
MAX
UNITS
Bits
Bits
LSB
LSB
LSB
ppm/°C
LSB
ppm/°C
LSB/V
nA
MIN
18
18
TYP
Static Performance
±0.25
±0.15
±0.05
±2
±5
V
DD
= 5V, V(R
IN
) = 5V unless otherwise specified. The
l
denotes specifications that apply over the full operating temperature range,
otherwise specifications are at T
A
= 25°C.
SYMBOL
Analog Pins
R1, R2
R
REF
R
FB
R
OFS
R
VOSADJ
R
GEADJ
C
IOUT1
Reference Inverting Resistors
DAC Input Resistance
Feedback Resistor
Bipolar Offset Resistor
Offset Adjust Resistor
Gain Adjust Resistor
Output Capacitance
Full-Scale
Zero-Scale
Span Code = 000, 10V Step (Note 7)
To ±0.0004% FS
V
DD
= 5V (Note 8)
V
DD
= 3V (Note 8)
V
DD
= 5V (Note 9)
V
DD
= 3V (Note 9)
0V to 5V Range, Code = Full-Scale, –3dB Bandwidth
0V to 5V Range, V
REF
= ±10V, 10kHz Sine Wave
(Note 10) Multiplying
(Note 11) at I
OUT1
(Note 4)
(Note 5)
(Note 6)
(Note 6)
l
l
l
l
l
l
PARAMETER
CONDITIONS
MIN
16
8
8
16
1024
2048
TYP
20
10
10
20
1280
2560
90
40
2.1
3
1.4
4
1.8
1
0.4
–110
13
MAX
UNITS
kΩ
kΩ
kΩ
kΩ
kΩ
kΩ
pF
pF
μs
nV•s
nV•s
nV•s
nV•s
MHz
mV
dB
nV/√Hz
Dynamic Performance
Output Settling Time
Glitch Impulse
Digital-to-Analog Glitch Impulse
Reference Multiplying Bandwidth
Multiplying Feedthrough Error
THD
Total Harmonic Distortion
Output Noise Voltage Density
2757f
3
LTC2757
ELECTRICAL CHARACTERISTICS
SYMBOL
V
DD
I
DD
V
IH
V
IL
PARAMETER
Supply Voltage
Supply Current, V
DD
Digital Input High Voltage
Digital Input Low Voltage
Hysteresis Voltage
I
IN
C
IN
V
OH
V
OL
Digital Input Current
Digital Input Capacitance
I
OH
= 200μA
I
OL
= 200μA
V
IN
= GND to V
DD
V
IN
= 0V (Note 12)
l
l
l
l
V
DD
= 5V, V(R
IN
) = 5V unless otherwise specified. The
l
denotes the
specifications which apply over the full operating temperature range, otherwise specifications are at T
A
= 25°C.
CONDITIONS
l
MIN
2.7
TYP
MAX
5.5
UNITS
V
μA
V
V
Power Supply
Digital Inputs = 0V or V
DD
3.3V ≤ V
DD
≤ 5.5V
2.7V ≤ V
DD
< 3.3V
4.5V < V
DD
≤ 5.5V
2.7V ≤ V
DD
≤ 4.5V
l
l
l
l
l
0.5
2.4
2
1
Digital Inputs
0.8
0.6
0.1
±1
6
V
DD
– 0.4
0.4
V
V
V
μA
pF
V
V
Digital Outputs
V
DD
= 5V, V(R
IN
) = 5V unless otherwise specified. The
l
denotes specifications that
apply over the full operating temperature range, otherwise specifications are at T
A
= 25°C.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
V
DD
= 4.5V to 5.5V
Write and Update Timing
t
1
t
2
t
3
t
4
t
5
t
6
t
7
t
8
t
13
t
14
t
15
t
17
t
18
t
19
t
20
t
22
t
23
t
24
I/O Valid to
WR
Rising Edge Set-Up
I/O Valid to
WR
Rising Edge Hold
WR
Pulse Width
UPD Pulse Width
UPD Falling Edge to
WR
Falling Edge
WR
Rising Edge to UPD Rising Edge
D/S
Valid to
WR
Falling Edge Set-Up Time
WR
Rising Edge to
D/S
Valid Hold Time
WR
Rising Edge to READ Rising Edge
READ Falling Edge to
WR
Falling Edge
READ Rising Edge to I/O Propagation Delay
UPD Valid to I/O Propagation Delay
D/S
Valid to READ Rising Edge
READ Rising Edge to UPD Rising Edge
UPD Falling Edge to READ Falling Edge
READ Falling Edge to UPD Rising Edge
I/O Bus Hi-Z to READ Rising Edge
READ Falling Edge to I/O Bus Active
(Note 12)
C
L
= 10pF
C
L
= 10pF
(Note 12)
No Update
No Update
(Note 12)
(Note 12)
(Note 12)
No Data Shoot-Through
(Note 12)
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
TIMING CHARACTERISTICS
9
9
20
20
0
0
9
9
9
20
30
30
9
9
9
9
0
20
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
2757f
Readback Timing
4
LTC2757
TIMING CHARACTERISTICS
SYMBOL
CLR
Timing
t
25
CLR
Pulse Width Low
l
V
DD
= 5V, V(R
IN
) = 5V unless otherwise specified. The
l
denotes specifications that
apply over the full operating temperature range, otherwise specifications are at T
A
= 25°C.
PARAMETER
CONDITIONS
MIN
20
TYP
MAX
UNITS
ns
V
DD
= 2.7V to 3.3V
Write and Update Timing
t
1
t
2
t
3
t
4
t
5
t
6
t
7
t
8
t
13
t
14
t
15
t
17
t
18
t
19
t
20
t
22
t
23
t
24
CLR
Timing
t
25
CLR
Pulse Width Low
l
I/O Valid to
WR
Rising Edge Set-Up
I/O Valid to
WR
Rising Edge Hold
WR
Pulse Width
UPD Pulse Width
UPD Falling Edge to
WR
Falling Edge
WR
Rising Edge to UPD Rising Edge
D/S
Valid to
WR
Falling Edge Set-Up Time
WR
Rising Edge to
D/S
Valid Hold Time
WR
Rising Edge to Read Rising Edge
Read Falling Edge to
WR
Falling Edge
Read Rising Edge to I/O Propagation Delay
UPD Valid to I/O Propagation Delay
D/S
Valid to Read Rising Edge
Read Rising Edge to UPD Rising Edge
UPD Falling Edge to Read Falling Edge
READ Falling Edge to UPD Rising Edge
I/O Bus Hi-Z to Read Rising Edge
Read Falling Edge to I/O Bus Active
(Note 12)
C
L
= 10pF
C
L
= 10pF
(Note 12)
No Update
No Update
(Note 12)
(Note 12)
(Note 12)
No Data Shoot-Through
(Note 12)
l
l
l
l
l
l
l
l
18
18
30
30
0
0
18
18
18
40
48
48
18
9
9
18
0
40
30
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Readback Timing
l
l
l
l
l
l
l
l
l
l
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2:
Continuous operation above the specified maximum operating
junction temperature may impair device reliability.
Note 3:
Temperature Coefficient is calculated by dividing the maximum
change in the parameter by the specified temperature range.
Note 4:
R1 is measured from R
IN
to R
COM
; R2 is measured from REF to
R
COM
.
Note 5:
Parallel combination of the resistances from REF to I
OUT1
and from
REF to I
OUT2
. DAC input resistance is independent of code.
Note 6:
Because of the proprietary SoftSpan switching architecture, the
measured resistance looking into each of the specified pins is constant for
all output ranges if the I
OUT1
and I
OUT2
pins are held at ground.
Note 7:
Using LT1468 with C
FEEDBACK
= 27pF A ±0.0004% settling time
.
of 1.8μs can be achieved by optimizing the time constant on an individual
basis. See Application Note 120,
1ppm Settling Time Measurement for a
Monolithic 18-Bit DAC.
Note 8:
Measured at the major carry transition, 0V to 5V range. Output
amplifier: LT1468; C
FB
= 50pF
.
Note 9:
Zero-code to full-code transition; REF = 0V. Falling transition is
similar or better.
Note 10:
REF = 6V
RMS
at 1kHz. 0V to 5V range. DAC code = FS. Output
amplifier = LT1468.
Note 11:
Calculation from V
n
= √4kTRB, where k = 1.38E-23 J/°K
(Boltzmann constant), R = resistance (Ω), T = temperature (°K), and B =
京公网安备 11010802033920号
EEWORLD
