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AN4325: DescriptionGetting started with STM32F030xx hardware development; File Size394KB，27 Pages; ManufacturerSTMicroelectronics; Websitehttp://www.st.com/

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AN4325 Overview

Getting started with STM32F030xx hardware development

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AN4325

Application note

Getting started with STM32F030xx hardware development

Introduction

This application note is intended for system designers who require a hardware

implementation overview of the development board features such as the power supply, the

clock management, the reset control, the boot mode settings and the debug management. It

shows how to use the STM32F030xx product family and describes the minimum hardware

resources required to develop an application.

This document includes detailed reference design schematics and the description of the

main components, interfaces and modes.

Table 1. Applicable products

Type

Microcontrollers

Part number

STM32F030F4,

STM32F030C6, STM32F030K6,

STM32F030C8, STM32F030R8.

Note:

In this document, the notation used for STM32F030xx devices is STM32F030.

The pin

count and memory size

not impact this hardware description.

November 2014

DocID024966 Rev 1

1/27

www.st.com

Contents

AN4325

Contents

Power supplies and reset sources of the STM32F030 family . . . . . . . . 6

1.1

Power supply schemes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

1.1.1

1.1.2

Independent analog converter supply . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Power-on reset (POR) / power-down reset (PDR) . . . . . . . . . . . . . . . . . . 9

System reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

1.2

Reset and power supply supervisor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

1.2.1

1.2.2

Clocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

2.1

2.2

2.3

2.4

2.5

2.6

High speed external clock signal (HSE) OSC clock . . . . . . . . . . . . . . . . . 13

LSE clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

HSI clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

LSI clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

ADC clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Clock security system (CSS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Boot configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Debug management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

4.1

4.2

4.3

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

SWD port (serial wire debug) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Pinout and debug port pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

4.3.1

4.3.2

4.3.3

4.3.4

Serial wire debug (SWD) pin assignment . . . . . . . . . . . . . . . . . . . . . . . 18

SWD pin assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Internal pull-up and pull-down on SWD pins . . . . . . . . . . . . . . . . . . . . . 19

SWD port connection with standard SWD connector . . . . . . . . . . . . . . 19

Recommendations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

5.1

5.2

5.3

5.4

5.5

Printed circuit board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Component position . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Ground and power supply (V

, V

DDA

) . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Decoupling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Other signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

DocID024966 Rev 1

2/27

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