EP2SGX90FF1508I5N datasheet, PDF

EP2SGX90FF1508I5N: DescriptionField Programmable Gate Array, 90960 CLBs, 622.08MHz, 90960-Cell, CMOS, PBGA1508, 40 X 40 MM, 1 MM PITCH, LEAD FREE, FBGA-1508; CategoryProgrammable logic devices Programmable logic; File Size4MB，314 Pages; ManufacturerAltera (Intel); Environmental Compliance

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EP2SGX90FF1508I5N Overview

Field Programmable Gate Array, 90960 CLBs, 622.08MHz, 90960-Cell, CMOS, PBGA1508, 40 X 40 MM, 1 MM PITCH, LEAD FREE, FBGA-1508

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Altera (Intel)
Parts packaging code	BGA
package instruction	40 X 40 MM, 1 MM PITCH, LEAD FREE, FBGA-1508
Contacts	1508
Reach Compliance Code	compliant
maximum clock frequency	622.08 MHz
Combined latency of CLB-Max	4.006 ns
JESD-30 code	S-PBGA-B1508
JESD-609 code	e1
length	40 mm
Configurable number of logic blocks	90960
Number of entries	650
Number of logical units	90960
Output times	650
Number of terminals	1508
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
organize	90960 CLBS
Package body material	PLASTIC/EPOXY
encapsulated code	BGA
Encapsulate equivalent code	BGA1508,39X39,40
Package shape	SQUARE
Package form	GRID ARRAY
Peak Reflow Temperature (Celsius)	245
power supply	1.2,1.2/3.3,3.3 V
Programmable logic type	FIELD PROGRAMMABLE GATE ARRAY
Certification status	Not Qualified
Maximum seat height	3.5 mm
Maximum supply voltage	1.25 V
Minimum supply voltage	1.15 V
Nominal supply voltage	1.2 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Tin/Silver/Copper (Sn/Ag/Cu)
Terminal form	BALL
Terminal pitch	1 mm
Terminal location	BOTTOM
Maximum time at peak reflow temperature	40
width	40 mm

Section I. Stratix II GX

Device Data Sheet

This section provides designers with the data sheet specifications for

Stratix

II GX devices. They contain feature definitions of the

transceivers, internal architecture, configuration, and JTAG

boundary-scan testing information, DC operating conditions, AC timing

parameters, a reference to power consumption, and ordering information

for Stratix II GX devices.

This section includes the following chapters:

■

Chapter 1, Introduction

Chapter 2, Stratix II GX Architecture

Chapter 3, Configuration & Testing

Chapter 4, DC and Switching Characteristics

Chapter 5, Reference and Ordering Information

Revision History

Refer to each chapter for its own specific revision history. For information

on when each chapter was updated, refer to the Chapter Revision Dates

section, which appears in the full handbook.

Altera Corporation

Section I–1

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