LT1949
600kHz, 1A Switch
PWM DC/DC Converter
FEATURES
s
s
s
s
s
s
s
DESCRIPTIO
1A, 0.5Ω, 30V Internal Switch
Operates with V
IN
as Low as 1.5V
600kHz Fixed Frequency Operation
Low-Battery Detector Stays Active in Shutdown
Low V
CESAT
Switch: 410mV at 800mA
Pin-for-Pin Compatible with the LT1317B
Small 8-Lead MSOP and SO Packages
APPLICATIO S
s
s
s
s
s
LCD Bias Supplies
GPS Receivers
Battery Backup
Portable Electronic Equipment
Diagnostic Medical Instrumentation
The LT
®
1949 is a fixed frequency step-up DC/DC con-
verter with a 1A, 0.5Ω internal switch. Capable of gener-
ating 10V at 175mA from a 3.3V input, the LT1949 is ideal
for generating bias voltages for large screen LCD panels.
Constant frequency 600kHz operation results in a low
noise output that is easy to filter and the 30V switch rating
allows output voltage up to 28V using a single inductor. An
external compensation pin gives the user flexibility in
optimizing loop compensation, allowing small low ESR
ceramic capacitors to be used at the output. The 8-lead
MSOP and SO packages ensure a low profile overall
solution.
The LT1949 includes a low-battery detector that stays
alive when the device goes into shutdown. Quiescent
current in shutdown is 25µA, while operating current is
4.5mA.
, LTC and LT are registered trademarks of Linear Technology Corporation.
TYPICAL APPLICATIO
V
IN
3.3V
L1
10µH
90
D1
80
SW
70
3.6V
IN
4.2V
IN
3V
IN
V
OUT
= 10V
+
C1
22µF
V
IN
LT1949
SHUTDOWN
SHDN
V
C
68k
330pF
FB
GND
R2
140k
V
OUT
10V
175mA
C2
10µF
CERAMIC
EFFICIENCY (%)
R1
1M
60
50
40
30
C1: AVX TAJA226M006R
C2: TAIYO YUDEN LMK325BJ106MN
D1: MBRM120LT3
L1: SUMIDA CDRH62B-100
1949 F01
20
5
10
50
100
LOAD CURRENT (mA)
300
1949 F02
Figure 1. 3.3V to 10V/175mA DC/DC Converter
Figure 2. 3.3V to 10V Converter Efficiency
U
U
U
1
LT1949
ABSOLUTE
AXI U
RATI GS
V
IN
, LBO Voltage ..................................................... 12V
SW Voltage ............................................... – 0.4V to 30V
FB Voltage .................................................... V
IN
+ 0.3V
V
C
Voltage ................................................................ 2V
LBI Voltage ............................................ 0V
≤
V
LBI
≤
1V
SHDN Voltage ........................................................... 6V
PACKAGE/ORDER I FOR ATIO
TOP VIEW
V
C
FB
SHDN
GND
1
2
3
4
8
7
6
5
LBO
LBI
V
IN
SW
ORDER PART
NUMBER
LT1949EMS8
MS8 PART MARKING
LTJC
MS8 PACKAGE
8-LEAD PLASTIC MSOP
T
JMAX
= 125°C,
θ
JA
= 120°C/W
Consult factory for Military grade parts.
ELECTRICAL CHARACTERISTICS
SYMBOL
I
Q
V
FB
I
B
g
m
A
V
PARAMETER
Quiescent Current
The
q
denotes specifications which apply over the full operating
temperature range, otherwise specifications are T
A
= 25°C. V
IN
= 2V, V
SHDN
= 2V unless otherwise noted.
CONDITIONS
V
SHDN
= 0V
Feedback Voltage
q
q
q
FB Pin Bias Current (Note 3)
Input Voltage Range
Error Amp Transconductance
Error Amp Voltage Gain
Maximum Duty Cycle
Switch Current Limit (Note 4)
V
IN
= 2.5V, Duty Cycle = 30%
V
IN
= 2.5V, Duty Cycle = 30%
V
SHDN
= V
IN
V
SHDN
= 0V
∆I
= 5µA
f
OSC
Switching Frequency
Shutdown Pin Current
LBI Threshold Voltage
LBO Output Low
LBO Leakage Current
LBI Input Bias Current (Note 5)
Low-Battery Detector Gain
Switch Leakage Current
I
SINK
= 10µA
V
LBI
= 250mV, V
LBO
= 5V
V
LBI
= 150mV
1MΩ Pull-Up
V
SW
= 5V
2
U
U
W
W W
U
W
(Note 1)
Junction Temperature .......................................... 125°C
Operating Temperature Range (Note 2)
LT1949EMS8 .......................................–40°C to 85°C
LT1949ES8/LT1949IS8 .......................–40°C to 85°C
Storage Temperature ........................... – 65°C to 150°C
Lead Temperature (Soldering, 10sec).................. 300°C
TOP VIEW
V
C
1
FB 2
SHDN 3
GND 4
8
7
6
5
LBO
LBI
V
IN
SW
ORDER PART
NUMBER
LT1949ES8
LT1949IS8
S8 PART MARKING
1949E
1949I
S8 PACKAGE
8-LEAD PLASTIC SO
T
JMAX
= 125°C,
θ
JA
= 120°C/W
MIN
TYP
4.5
25
MAX
7.5
40
1.26
1.26
80
12
240
UNITS
mA
µA
V
V
nA
V
µmhos
V/V
%
1.22
1.20
1.7
70
80
1
0.95
500
1.24
1.24
12
140
700
85
1.13
600
0.015
– 2.3
q
q
q
q
q
q
q
q
q
q
q
q
1.5
1.5
750
0.1
–7
210
220
0.25
0.1
60
3
A
A
kHz
µA
µA
mV
mV
V
µA
nA
V/V
µA
190
180
200
200
0.15
0.02
5
2000
0.01
q
LT1949
ELECTRICAL CHARACTERISTICS
SYMBOL
PARAMETER
Switch V
CESAT
Reference Line Regulation
SHDN Input Voltage High
SHDN Input Voltage Low
The
q
denotes specifications which apply over the full operating
temperature range, otherwise specifications are T
A
= 25°C. V
IN
= 2V, V
SHDN
= 2V unless otherwise noted.
CONDITIONS
I
SW
= 800mA
I
SW
= 500mA
1.8V
≤
V
IN
≤
12V
q
q
q
q
MIN
TYP
410
MAX
400
UNITS
mV
mV
%/V
V
V
0.08
1.4
0.15
6
0.4
Note 1:
Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2:
The LT1949E is guaranteed to meet performance specifications
from 0°C to 70°C. Specifications over the – 40°C to 85°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls.
Note 3:
Bias current flows into FB pin.
Note 4:
Switch current limit guaranteed by design and/or correlation to
static tests. Duty cycle affects current limit due to ramp generator.
Note 5:
Bias current flows out of LBI pin.
TYPICAL PERFOR A CE CHARACTERISTICS
Oscillator Frequency
700
OSCILLATOR FREQUENCY (kHz)
–40°C
25°C
600
85°C
SWITCH CURRENT (A)
SWITCH CURRENT (A)
650
550
500
0
2
4
6
8
INPUT VOLTAGE
Switch Voltage Drop (V
CESAT
)
1.0
1.25
QUIESCENT CURRENT (mA)
0.8
85°C
25°C
0.4
–40°C
0.2
FEEDBACK VOLTAGE (V)
SWITCH VOLTAGE (V)
0.6
0
0
0.2
0.4
0.6
0.8
SWITCH CURRENT (A)
1.0
1.2
1949 G04
U W
10
12
1949 G01
Switch Current Limit
1.3
Switch Current Limit,
Duty Cycle = 30%
1.3
1.2
1.2
1.1
1.1
1.0
1.0
0.9
0.9
0.8
0
20
60
40
DUTY CYCLE (%)
80
100
1949 G02
0.8
–50
–25
0
25
50
TEMPERATURE (°C)
75
100
1949 G03
Feedback Voltage
4.6
4.5
1.24
Quiescent Current, SHDN = 2V
4.4
4.3
4.2
4.1
4.0
3.9
1.23
1.22
1.21
1.20
–50
–25
0
25
50
TEMPERATURE (°C)
75
100
1949 G05
3.8
–50
–25
0
25
50
TEMPERATURE (°C)
75
100
1949 G06
3
LT1949
TYPICAL PERFOR A CE CHARACTERISTICS
Quiescent Current, SHDN = 0V
26
25
QUIESCENT CURRENT (µA)
FB PIN BIAS CURRENT (nA)
24
23
22
21
20
–50
28
24
20
16
12
8
4
SHDN PIN CURRENT (µA)
–25
0
25
50
TEMPERATURE (°C)
Load Regulation
V
OUT
50mV/DIV
DC
COUPLED
OFFSET
ADDED
V
OUT
50mV/DIV
DC
COUPLED
OFFSET
ADDED
I
LOAD
25mA/DIV
V
IN
= 3V
V
OUT
= 10V
L1 = 10µH, SUMIDA CD54
C
OUT
= 10µF CERAMIC
PI FU CTIO S
V
C
(Pin 1):
Compensation Pin for Error Amplifier. Con-
nect a series RC network from this pin to ground. Typical
values for compensation are a 68k/330pF combination
when using ceramic output capacitors. Minimize trace
area at V
C
.
FB (Pin 2):
Feedback Pin. Reference voltage is 1.24V.
Connect resistor divider tap here. Minimize trace area at
FB. Set V
OUT
according to: V
OUT
= 1.24V(1 + R1/R2).
SHDN (Pin 3):
Shutdown. Pull this pin low for shutdown
mode (only the low-battery detector remains active).
Leave this pin floating or tie to a voltage between 1.4V and
6V to enable the device. SHDN pin is logic level and need
only meet the logic specification (1.4V for high, 0.4V for
low).
GND (Pin 4):
Ground. Connect directly to local ground
plane.
SW (Pin 5):
Switch Pin. Connect inductor/diode here.
Minimize trace area at this pin to keep EMI down.
V
IN
(Pin 6):
Supply Pin. Must be bypassed close to the
pin.
LBI (Pin 7):
Low-Battery Detector Input. 200mV refer-
ence. Voltage on LBI must stay between ground and
700mV. Low-battery detector remains active in shutdown
mode.
LBO (Pin 8):
Low-Battery Detector Output. Open collec-
tor, can sink 10µA. A 1MΩ pull-up is recommended.
4
U W
75
1317 TPC10
FB Pin Bias Current
40
36
32
SHDN Pin Current
2
1
0
–1
–2
100
0
–50
–3
–25
0
25
50
TEMPERATURE (°C)
75
100
0
1
2
4
3
SHDN PIN VOLTAGE (V)
5
6
1317 TPC12
1317 TPC11
Load Regulation
V
OUT
100mV/DIV
AC COUPLED
I
L
500mA/DIV
I
LOAD
200mA
100mA
I
LOAD
50mA/DIV
V
IN
= 4V
V
OUT
= 10V
L1 = 10µH, SUMIDA CD54
C
OUT
= 10µF CERAMIC
Transient Response
50µs/DIV
V
IN
= 3.3V
V
OUT
= 10V
CIRCUIT OF FIGURE 1
1949 G11
1949 G12
1949 G10
U
U
U
LT1949
BLOCK DIAGRA
1.24V
REFERENCE
V
OUT
BIAS
R1
(EXTERNAL)
FB
RAMP
GENERATOR
600kHz
OSCILLATOR
Figure 3. LT1949 Block Diagram
OPERATIO
The LT1949 is a current mode, fixed frequency step-up
DC/DC converter with an internal 1A NPN power transis-
tor. Operation can best be understood by referring to the
Block Diagram.
At the beginning of each oscillator cycle, the flip-flop is set
and the switch is turned on. Current in the switch ramps
up until the voltage at A2’s positive input reaches the V
C
pin voltage, causing A2’s output to change state and the
switch to be turned off. The signal at A2’s positive input is
a summation of a signal representing switch current and
a ramp generator (introduced to avoid subharmonic oscil-
lations at duty factors greater than 50%). If the load
increases, V
OUT
(and FB) will drop slightly and the error
amplifier will drive V
C
to a higher voltage, causing current
in the switch to increase. In this way, the error amplifier
drives the V
C
pin to the voltage necessary to satisfy the
load. Frequency compensation is provided by an external
series RC network connected between the V
C
pin and
ground.
+
+
Σ
+
–
R2
(EXTERNAL)
W
LBI
+
FB
2
g
m
V
C
1
200mV
ENABLE
7
+
–
A4
LBO
8
–
ERROR
AMPLIFIER
+
–
SHDN
SHUTDOWN
3
A1
COMPARATOR
SW
5
FF
R
A2
COMPARATOR
S
Q
DRIVER
Q3
+
A=2
0.06Ω
–
4
GND
1949 BD
U
Layout Hints
The LT1949 switches current at high speed, mandating
careful attention to layout for proper performance.
You
will not get advertised performance with careless layouts.
Figure 4 shows recommended component placement for
a boost (step-up) converter. Follow this closely in your PC
layout. Note the direct path of the switching loops. Input
capacitor C1
must
be placed close (< 5mm) to the IC
package. As little as 10mm of wire or PC trace from C
IN
to
V
IN
will cause problems such as inability to regulate or
oscillation.
The ground terminal of output capacitor C2 should tie
close to Pin 4 of the LT1949. Doing this reduces dI/dt in the
ground copper which keeps high frequency spikes to a
minimum. The DC/DC converter ground should tie to the
PC board ground plane at one place only, to avoid intro-
ducing dI/dt in the ground plane.
5
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