BTA16, BTB16
T1610, T1635
16 A Snubberless™, logic
level and standard Triacs
TO-220AB
insulated
BTA16
TO-220AB
BTB16
Features
■
■
■
■
■
■
■
Medium current Triac
Low thermal resistance with clip bonding
Low thermal resistance insulation ceramic for
insulated BTA
High commutation (4Q) or very high
commutation (3Q) capability
BTA series UL1557 certified (File ref: 81734)
RoHS ( 2002/95/EC) compliant
Insulated tab (BTA series, rated at 2500 V
RMS
)
D
2
PAK
T1635G
T1610G
Applications
■
A2
Snubberless versions (BTA/BTB...W and
T1635) especially recommended for use on
inductive loads, because of their high
commutation performances
On/off or phase angle function in applications
such as static relays, light dimmers and
appliance motor speed controllers
G
A1
■
Description
Available either in through-hole or surface-mount
packages, the BTA16, BTB16, T1610 and T1635
Triacs series are suitable for general purpose
mains power AC switching.
Table 1.
Symbol
I
T(RMS)
V
DRM
/V
RRM
Device summary
Parameter
On-state rms current
Repetitive peak off-state voltage
BTA16
(1)
16
600/800
35/50
10
25/50
BTB16
16
600/800
35/50
10
25/50
T1610
16
600/800
-
10
-
T1635
16
600/800
35
-
-
I
GT
(Snubberless) Triggering gate current
I
GT
(logic level)
I
GT
(standard)
1. Insulated
Triggering gate current
Triggering gate current
TM:
Snubberless is a trademark of STMicroelectronics
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BTA16, BTB16
T1610, T1635
Table 2.
Symbol
Absolute maximum ratings
Parameter
D
2
PAK /
TO-220AB
TO-220AB
insulated
F = 50 Hz
F = 60 Hz
t
p
= 10 ms
T
j
= 125 °C
T
j
= 25 °C
T
j
= 125 °C
T
j
= 125 °C
T
c
= 100 °C
16
T
c
= 86 °C
t = 20 ms
t = 16.7 ms
160
A
168
144
50
V
DRM
/V
RRM
+ 100
4
1
-40 to + 150
-40 to + 125
Value
Unit
I
T(RMS)
On-state rms current
(full sine wave)
A
I
TSM
I
²
t
dI/dt
V
DSM
/
V
RSM
I
GM
P
G(AV)
T
stg
T
j
Non repetitive surge peak on-state
current
(full cycle, T
j
initial = 25 °C)
I
²
t value for fusing
A
²
s
A/µs
V
A
W
Critical rate of rise of on-state current
F = 120 Hz
I
G
= 2 x I
GT
, t
r
≤
100 ns
Non repetitive surge peak off-state
voltage
Peak gate current
Average gate power dissipation
Storage temperature range
Maximum operating junction temperature
t
p
= 10 ms
t
p
= 20 µs
Table 3.
Electrical characteristics (T
j
= 25 °C, unless otherwise specified)
Snubberless and logic level (3 quadrants)
BTA16 / BTB16
Test conditions
Quadrant
I - II - III
I - II - III
I - II - III
Max.
Max.
Min.
Max.
I - III
Max.
II
T
j
= 125 °C
Min.
30
40
8.5
Min.
3.0
-
60
500
-
-
8.5
30
40
8.5
3.0
-
60
500
-
-
8.5
80
1000
-
-
14
A/ms
V/µs
15
25
35
50
T1610 T1635
SW
CW
35
BW
50
mA
V
V
35
50
50
70
mA
mA
10
35
10
1.3
0.2
15
25
Unit
Symbol
I
GT (1)
V
GT
V
GD
I
H (2)
I
L
dV/dt
(2)
V
D
= 12 V
R
L
= 33
Ω
V
D
= V
DRM
R
L
= 3.3 kΩ
T
j
= 125 °C
I
T
= 500 mA
I
G
= 1.2 I
GT
V
D
= 67 %V
DRM
gate open
(dV/dt)c = 0.1 V/µs T
j
= 125 °C
(dI/dt)c
(2)
(dV/dt)c = 10 V/µs
Without snubber
T
j
= 125 °C
T
j
= 125 °C
1. Minimum IGT is guaranted at 5% of I
GT
max
2. For both polarities of A2 referenced to A1
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BTA16, BTB16
T1610, T1635
Table 4.
Electrical characteristics (T
j
= 25 °C, unless otherwise specified)
standard (4 quadrants)
BTA16 / BTB16
Symbol
Test conditions
Quadrant
C
I
GT (1)
V
GT
V
GD
I
H (2)
I
L
V
D
= V
DRM
R
L
= 3.3 kΩ T
j
= 125 °C
I
T
= 500 mA
I - III - IV
I
G
= 1.2 I
GT
Max.
II
T
j
= 125 °C
T
j
= 125 °C
Min.
Min.
80
200
5
120
400
10
V/µs
V/µs
I - II - III
IV
ALL
ALL
Max.
Max.
Min.
Max.
25
40
25
50
1.3
0.2
50
60
mA
B
50
100
mA
V
V
mA
Unit
V
D
= 12 V
R
L
= 33
Ω
dV/dt
(2)
V
D
= 67 %V
DRM
gate open
(dV/dt)c
(2)
(dI/dt)c = 7 A/ms
1. Minimum IGT is guaranted at 5% of I
GT
max
2. For both polarities of A2 referenced to A1
Table 5.
Symbol
V
T
(2)
V
to
(2)
R
d
(2)
I
DRM
I
RRM
Static characteristics
Test conditions
I
TM
= 22.5 A
t
p
= 380 µs
T
j
= 25 °C
T
j
= 125 °C
T
j
= 125 °C
T
j
= 25 °C
T
j
= 125 °C
Max.
Max.
Max.
Max.
2
mA
Value
1.55
0.85
25
5
Unit
V
V
mΩ
µA
Threshold voltage
Dynamic resistance
V
DRM
= V
RRM
Table 6.
Symbol
R
th(j-c)
Thermal resistance
Parameter
D
2
PAK / TO-220AB
Junction to case (AC)
TO-220AB insulated
S
(1)
= 1 cm
²
D
2
PAK
2.1
45
°C/W
60
Value
1.2
°C/W
Unit
R
th(j-a)
Junction to ambient
TO-220AB / TO-220AB
insulated
1. S = Copper surface under tab
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BTA16, BTB16
T1610, T1635
Figure 1.
P(W)
20
18
16
14
12
10
8
6
4
2
0
0
2
4
6
8
10
12
14
16
8
6
4
18
16
14
BTA
BTB / T16
Maximum power dissipation versus Figure 2.
on-state rms current (full cycle)
I
T(RMS)
(A)
On-state rms current versus case
temperature (full cycle)
12
10
I
T(RMS)
(A)
2
0
0
25
50
T
C
(°C)
75
100
125
Figure 3.
I
T(RMS)
(A)
4.0
On-state rms current versus
ambient temperature (full cycle)
Figure 4.
Relative variation of thermal
impedance versus pulse duration
K=[Z
th
/R
th
]
1E+0
D
2
PAK
(S=1cm
2
)
Z
th(j-c)
printed circuit board FR4, copper thickness: 35 µm
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
0
25
50
Z
th(j-a)
1E-1
T
C
(°C)
75
100
125
1E-2
1E-3
1E-2
1E-1
t
p
(s)
1E+0
1E+1
1E+2
5E+2
Figure 5.
I
TM
(A)
200
100
T
j
max.
V
to
= 0.85V
R
d
= 25 m
Ω
On-state characteristics
(maximum values)
Figure 6.
Surge peak on-state current versus
number of cycles
I
TSM
(A)
180
160
140
t=20ms
T
j
= T
j
max.
120
100
T
j
= 25°C.
Non repetitive
T
j
initial=25°C
One cycle
10
80
60
40
Repetitive
T
C
=85°C
V
TM
(V)
1
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
20
0
1
10
Number of cycles
100
1000
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BTA16, BTB16
T1610, T1635
Figure 7.
Non-repetitive surge peak on-state Figure 8.
current for a sinusoidal
2
2
Relative variation of gate trigger
current
I
TSM
(A), I t (A s)
3000
T
j
initial=25°C
dI/dt limitation:
50A/µs
I
GT
,I
H
,I
L
[T
j
] / I
GT
,I
H
,I
L
[T
j
=25°C]
2.5
holding current and latching current versus junction
temperature (typical values)
2.0
I
GT
1000
I
TSM
1.5
I
H
& I
L
1.0
I
2
t
0.5
2
100
pulse with width t
p
< 10 ms and corresponding value of I t
0.01
0.10
1.00
t
p
(ms)
10.00
T
j
(°C)
0.0
-40
-20
0
20
40
60
80
100
120
140
Figure 9.
Relative variation of critical rate of
decrease of main current versus
(dV/dt)c (typical values)
Figure 10. Relative variation of critical rate of
decrease of main current versus
(dV/dt)c (typical values)
(dI/dt)c [T
j
] / (dI/dt)c [T
j
specified]
6
Standard types
(dI/dt)c [(dV/dt)c] / Specified (dI/dt)c
2.0
Snubberless and Logic level types
1.8
1.6
B
C
SW
5
4
3
2
1
1.4
1.2
1.0
0.8
0.6
T1635/CW/BW
(dV/dt)c (V/µs)
0.4
0.1
1.0
10.0
100.0
0
0
25
50
T
j
(°C)
75
100
125
Figure 11. D
2
PAK thermal resistance junction to ambient versus copper surface under tab
(printed circuit board FR4, copper thickness: 35 µm)
R
th(j-a)
(°C/W)
80
70
60
50
D
2
PAK
40
30
20
10
S(cm²)
0
0
4
8
12
16
20
24
28
32
36
40
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