RVX5032P
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SMD Voltage Control Crystal Oscillator
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High performance VCXO in 5 x 3.2 mm Surface Mount Package
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Product description
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The RVX5032P VCXO combines very low RMS phase jitter and low supply current in a small 5
x 3.2 mm SMD package. Available in hundreds of industry standard frequencies from 8 MHz
to 800 MHz for fast delivery and reduced inventory levels.
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Applications
•
•
•
•
Basestation
Communications
Ethernet
SONET/SDH
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Features
• 0.5 ps integrated RMS phase jitter (12 kHz to 20 MHz)
• Fast sample turnaround available
• LVCMOS, LVPECL, or LVDS Output options
• Wide frequency range
• Low power differential outputs
• Small form factor
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Specifications
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Line
1.1
1.2
1.3
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Parameter
Model Description
Reference Number
Rakon Part Number
Description
RVX5032P VCXO
2.0
Line
2.1
2.2
2.3
2.4
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FREQUENCY CHARACTERISTICS
Parameter
Frequency
Operating
Temperature Range
Frequency Stability
eli
Test Condition
m
Value
8 to 1500
-40 to 85
±30 to 50
±10 to 20
1.0
SPECIFICATIONS REFERENCES
in
Unit
MHz
°C
ppm
ppm
Value
3.3
2.5
30 max
65 max
40 max
Unit
V
V
mA
mA
mA
Page 1
Temperature Stability
3.0
Line
3.1
3.2
3.3
3.4
3.5
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POWER SUPPLY
Parameter
Supply Voltage (VDD)
Supply Voltage (VDD)
Supply Current
Supply Current
Supply Current
Pr
For LVDS
Including Temperature range, Supply variation, Load variation &
15 years aging at 25°C
Temperature range only
Test Condition
With a tolerance of
±10%
With a tolerance of
±5%
For LVCMOS
For LVPECL
ar
y
4.0
Line
4.1
4.2
4.3
4.4
4.5
4.6
4.7
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CONTROL VOLTAGE (VCO)
Parameter
Absolute Pull Range
(APR)
Total Pull Range
Control Voltage
Linearity
Slope
Modulation BW
Input Impedance
Frequency shift from minimum to maximum control voltage
Nominal 1.65V
Control voltage 0.3 to 3V
Positive only
Control voltage 0.3 to 3V
10 min
1 min
kHz
MΩ
Test Condition
Value
±50 min
400 max
0 to 3.3
15 max
Unit
ppm
ppm
V
%
5.0
Line
5.1
5.2
5.3
5.4
5.5
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OUTPUT CHARACTERISTICS - LVCMOS UP TO 200MHz ONLY
Parameter
Output Voltage (Vol)
Output Voltage (Voh)
Duty Cycle
Rise Time / Fall Time
RMS Phase Jitter
Test Condition
15pF load
Value
10 max
Unit
%VDD
%VDD
%
ns
ps
@ 50% VDD
90%/10% at 15 pF output load
Typical integrated 12 kHz to 20 MHz
y
15pF load
90 min
48 to 52
3 max
0.5
6.0
Line
6.1
6.2
6.3
6.4
6.5
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OUTPUT CHARACTERISTICS - LVPECL ONLY
Parameter
Output Voltage (Vol)
Output Voltage (Voh)
Duty Cycle
Rise Time / Fall Time
RMS Phase Jitter
Test Condition
ar
Value
Unit
50Ω nominal load. (VDD - 1.03V) min.
@ VDD-1.3V (45 to 50% for 600MHz+)
80%/20% at 50Ω output load
in
Page 2
50Ω nominal load. (VDD - 1.6V) max.
48 to 52
0.6 max
0.5
%
ns
ps
Typical integrated 12kHz to 20MHz
7.0
Line
7.1
7.2
7.3
7.4
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OUTPUT CHARACTERISTICS - LVDS ONLY
Parameter
Differential Output:
Voltage Swing (Vod)
Duty Cycle
Rise Time / Fall Time
RMS Phase Jitter
Test Condition
m
Value
350
48 to 52
0.6 max
0.5
Unit
mV
%
ns
ps
Line
8.1
Parameter
Pr
8.0
SSB PHASE NOISE
eli
Test Condition
Measured at 1.25V (45 to 50% for 600MHz+)
RL = 100
Ω
/ CL = 10 pF
Typical integrated 12kHz to 20MHz
Value
-68
Unit
dBc/Hz
SSB Phase Noise
power density @ 10
Hz offset
Typical value for a 77.76 MHz VCXO @ 25
°C
8.2
SSB Phase Noise
power density @ 100
Hz offset
SSB Phase Noise
power density @ 1
kHz offset
SSB Phase Noise
power density @ 10
kHz offset
SSB Phase Noise
power density @ 100
kHz offset
Typical value for a 77.76 MHz VCXO @ 25
°C
-95
dBc/Hz
8.3
Typical value for a 77.76 MHz VCXO @ 25
°C
-120
dBc/Hz
8.4
Typical value for a 77.76 MHz VCXO @ 25
°C
-125
dBc/Hz
8.5
Typical value for a 77.76 MHz VCXO @ 25
°C
-128
dBc/Hz
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9.0
Line
9.1
SSB PHASE NOISE
Parameter
SSB Phase Noise
Power Density @ 10
Hz Offset
SSB Phase Noise
Power Density @ 100
Hz Offset
SSB Phase Noise
Power Density @ 1
kHz Offset
SSB Phase Noise
Power Density @ 10
kHz Offset
SSB Phase Noise
Power Density @ 100
kHz Offset
Test Condition
Typical value for a 155.52 MHz VCXO @ 25°C
Value
-62
Unit
dBc/Hz
9.2
Typical value for a 155.52 MHz VCXO @ 25°C
-90
dBc/Hz
9.3
Typical value for a 155.52 MHz VCXO @ 25°C
-112
dBc/Hz
9.4
Typical value for a 155.52 MHz VCXO @ 25°C
-118
dBc/Hz
9.5
Typical value for a 155.52 MHz VCXO @ 25°C
-120
dBc/Hz
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10.0
Line
10.1
SSB PHASE NOISE
Parameter
SSB Phase Noise
Power Density @ 10
Hz Offset
SSB Phase Noise
power density @ 100
Hz offset
SSB Phase Noise
power density @ 1kHz
offset
SSB Phase Noise
power density @ 10
kHz offset
SSB Phase Noise
power density @ 100
kHz offset
SSB Phase Noise
power density @ 100
MHz offset
Test Condition
y
ar
in
Page 3
Value
-43
Unit
dBc/Hz
Typical value for a 622.08 MHz VCXO @ 25°C
10.2
Typical value for a 622.08 MHz VCXO @ 25°C
-72
dBc/Hz
10.3
Typical value for a 622.08 MHz VCXO @ 25°C
-98
dBc/Hz
10.4
Typical value for a 622.08 MHz VCXO @ 25°C
-108
dBc/Hz
10.5
Typical value for a 622.08 MHz VCXO @ 25°C
m
-114
dBc/Hz
10.6
Typical value for a 622.08 MHz VCXO @ 25°C
-120
dBc/Hz
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11.0
Line
11.1
11.2
11.3
11.4
11.5
11.6
11.7
11.8
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PIN CONNECTIONS
Parameter
Pin 1
Pin 2
Pin 3
Pin 4
Pin 5
Pin 6
* Output Enabled
* Output Disabled
12.0
Line
12.1
12.2
12.3
12.4
12.5
12.6
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PACKAGE DETAIL
Parameter
Package
Top line
Middle line
Bottom line
* Year code
** Week Code
Description
F
[R ######] Part identifier
[######] Part information
[o FYWW] Pin 1, Manufacturing code, Year code* and Week code**
A = 2010, B = 2011, C = 2012, D = 2013, ... Z = 2035
WW = 01 = Week of first Monday of the year
Pr
GND
OUTPUT
VDD
eli
Description
VCO
E/D* or NC
COMPLIMENTARY OUTPUT (LVPECL/LVDS only), or E/D*, or NC
>70% of VDD on E/D pin, or E/D pin left open (connected to internal pull-up resistor)
<30% of VDD on E/D pin, or E/D pin to GND
13.0
Line
13.1
13.2
13.3
13.4
13.5
13.6
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ENVIRONMENTAL SPECIFICATIONS
Parameter
Mechanical Shock
Storage Temperature
range
Thermal Shock
Vibration
Gross and Fine Leak
RoHS Compliant
Description
MIL-STD-883, Method 2002
-55 to 125
°C
MIL-STD-883, Method 1011
MIL-STD-883, Method 2007
MIL-STD-883, Method 1014
Yes
14.0
Line
14.1
14.2
MANUFACTURING INFORMATION
Parameter
Packaging Description
Reflow
Description
Tape and reel. Standard packing quantity is 4000 per reel
Solder reflow process as per attached profile
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Pr
Page 4
eli
m
in
ar
y
Drawing Name: XO/VCXO 5032 6-Pin Model Drawing
Pr
Page 5
eli
m
in
ar
y
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