IRLR8103V
D-Pak
D
•
•
•
•
•
N-Channel Application-Specific MOSFETs
Ideal for CPU Core DC-DC Converters
Low Conduction Losses
Low Switching Losses
Minimizes Parallel MOSFETs for high current
applications
•
100% R
G
Tested
G
S
Description
The IRLR8103V has been optimized for all parameters
that are critical in synchronous buck converters including
R
DS(on)
, gate charge and Cdv/dt-induced turn-on immunity.
The IRLR8103V offers an extremely low combination of
Q
sw
& R
DS(on)
for reduced losses in both control and
synchronous FET applications.
The package is designed for vapor phase, infra-red,
convection, or wave soldering techniques. Power
dissipation of greater than 2W is possible in a typical
PCB mount application.
DEVICE CHARACTERISTICS
R
DS(on)
Q
G
Q
SW
Q
OSS
IRLR8103V
7.9 mΩ
27 nC
12 nC
29nC
Absolute Maximum Ratings
Parameter
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain or Source Current
(V
GS
> 10V)
Pulsed Drain Current
TC = 25°C
TC= 90°C
Symbol
V
DS
V
GS
I
D
I
DM
P
D
T
J
, T
STG
I
S
I
SM
IRLR8103V
30
±20
91
63
363
115
60
-55 to 150
91
363
Units
V
TC = 25°C
Power Dissipation
eÃÃÃÃÃÃÃÃÃÃÃÃÃ
TC = 90°C
Junction & Storage Temperature Range
Continuous Source Current (Body Diode)
Pulsed Source Current
A
W
°C
A
Thermal Resistance
Parameter
Maximum Junction-to-Ambient
Maximum Junction-to-Case
h
eh
Symbol
R
θJA
R
θJC
Typ.
–––
–––
Max.
50
1.09
Units
°C/W
2014-8-25
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IRLR8103V
Electrical Characteristics
Parameter
Drain-to-Source Breakdown Voltage
Static Drain-Source
On-Resistance
Gate Threshold Voltage
Drain-to-Source Leakage Current
Symbol Min Typ Max Units
BV
DSS
R
DS(on)
V
GS(th)
I
DSS
30
–––
–––
1.0
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
0.8
–––
–––
–––
–––
–––
–––
–––
–––
6.9
7.9
–––
–––
–––
–––
9.0
10.5
3.0
50
20
V
mΩ
V
µA
µA
nA
Conditions
V
GS
= 0V, I
D
= 250µA
V
GS
= 10V, I
D
= 15A
V
GS
= 4.5V, I
D
d
= 15A
d
V
DS
= V
GS
, I
D
= 250µA
V
DS
= 30V, V
GS
= 0V
V
DS
= 24V, V
GS
= 0
V
DS
= 24V, V
GS
= 0, T
J
= 100°C
V
GS
= ± 20V
V
GS
= 5V, I
D
= 15A, V
DS
= 16V
V
GS
= 5V, V
DS
< 100mV
Gate-Source Leakage Current
Total Gate Charge, Control FET
Total Gate Charge, Synch FET
Pre-Vth Gate-Source Charge
Post-Vth Gate-Source Charge
Gate to Drain Charge
Switch Charge (Q
gs2
+ Q
gd
)
Output Charge
Gate Resistance
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
I
GSS
Q
G
Q
G
Q
GS1
Q
GS2
Q
GD
Q
SW
Q
OSS
R
G
t
d(on)
t
r
t
d(off)
t
f
C
iss
C
oss
C
rss
––– 100
––– ±100
27
23
4.7
2.0
9.7
12
29
–––
10
9
24
18
–––
–––
–––
–––
–––
–––
–––
3.1
–––
–––
–––
–––
nC
V
DS
= 16V, I
D
= 15A
V
DS
= 16V, V
GS
= 0
Ω
V
DD
= 16V
ns
I
D
= 15A
V
GS
= 5.0V
Clamped Inductive Load
pF
V
GS
= 16V, V
GS
=0
2672 –––
1064 –––
109
–––
Source-Drain Rating & Characteristics
Parameter
Diode Forward Voltage
Reverse Recovery Charge
Reverse Recovery Charge
(with Parallel Schottky)
Symbol Min Typ Max Units
V
SD
Q
rr
Q
rr(s)
–––
–––
–––
0.9
103
96
1.3
–––
–––
V
nC
nC
f
IS = 15A , V
GS
= 0V
di/dt ~ 700A/µs
V
DS
= 16V, V
GS
= 0V, I
F
= 15A
di/dt = 700A/µs , (with 10BQ040)
V
DS
= 16V, V
GS
= 0V, I
F
= 15A
d
Conditions
f
Notes:
Repetitive rating; pulse width limited by max. junction temperature.
Pulse width
≤
400 µs; duty cycle
≤
2%.
When mounted on 1 inch square copper board, t < 10 sec.
Typ = measured - Q
oss
Typical values of R
DS
(on) measured at V
GS
= 4.5V, Q
G
, Q
SW
and Q
OSS
measured at V
GS
= 5.0V, I
F
= 15A.
R
θ
is measured at T
J
approximately 90°C
2014-8-25
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IRLR8103V
1000
100
I
D
, Drain-to-Source Current (A)
I
D
, Drain-to-Source Current (A)
VGS
15V
10V
7.0V
5.5V
4.5V
4.0V
3.5V
BOTTOM 2.7V
TOP
1000
VGS
15V
10V
7.0V
5.5V
4.5V
4.0V
3.5V
BOTTOM 2.7V
TOP
100
2.7V
2.7V
10
10
1
0.1
20µs PULSE WIDTH
T
J
= 25
°
C
1
10
100
1
0.1
20µs PULSE WIDTH
T
J
= 150
°
C
1
10
100
V
DS
, Drain-to-Source Voltage (V)
V
DS
, Drain-to-Source Voltage (V)
Fig 1.
Typical Output Characteristics
Fig 2.
Typical Output Characteristics
R
DS(on)
, Drain-to-Source On Resistance
(Normalized)
1000
2.0
I
D
= 15A
I
D
, Drain-to-Source Current (A)
T
J
= 25
°
C
1.5
100
T
J
= 150
°
C
1.0
0.5
10
2.0
V DS= 15V
20µs PULSE WIDTH
3.0
4.0
5.0
6.0
7.0
0.0
-60 -40 -20
V
GS
= 10V
0
20 40 60 80 100 120 140 160
V
GS
, Gate-to-Source Voltage (V)
T
J
, Junction Temperature (
°
C)
Fig 3.
Typical Transfer Characteristics
Fig 4.
Normalized On-Resistance
Vs. Temperature
2014-8-25
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IRLR8103V
5000
V
GS
, Gate-to-Source Voltage (V)
4000
V
GS
=
C
iss
=
C
rss
=
C
oss
=
0V,
f = 1MHz
C
gs
+ C
gd ,
C
ds
SHORTED
C
gd
C
ds
+ C
gd
6
I
D
=
15A
5
V
DS
= 24V
V
DS
= 15V
C, Capacitance (pF)
4
3000
Ciss
3
2000
Coss
2
1000
1
Crss
0
1
10
100
0
V
DS
, Drain-to-Source Voltage (V)
0
5
10
15
20
25
30
Q
G
, Total Gate Charge (nC)
Fig 5.
Typical Capacitance Vs.
Drain-to-Source Voltage
1000
10000
Fig 6.
Typical Gate Charge Vs.
Gate-to-Source Voltage
I
SD
, Reverse Drain Current (A)
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
100
T
J
= 150
°
C
I
D
, Drain Current (A)
1000
10us
10
100
100us
T
J
= 25
°
C
1
10
1ms
0.1
0.0
V
GS
= 0 V
0.4
0.8
1.2
1.6
2.0
2.4
1
T
C
= 25 °C
T
J
= 150 °C
Single Pulse
1
10
10ms
100
V
SD
,Source-to-Drain Voltage (V)
V
DS
, Drain-to-Source Voltage (V)
Fig 7.
Typical Source-Drain Diode
Fig 7.
Typical Source-Drain Diode
Forward
Voltage
Forward
Voltage
Fig 8.
Maximum Safe Operating Area
2014-8-25
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IRLR8103V
100
V
DS
R
D
LIMITED BY PACKAGE
80
V
GS
R
G
10V
Pulse Width
≤ 1
µs
Duty Factor
≤ 0.1 %
D.U.T.
+
V
DD
I
D
, Drain Current (A)
-
60
40
Fig 10a.
Switching Time
Test
Circuit
Fig 10a.
Switching Time
Test
Circuit
V
DS
90%
20
0
25
50
75
100
125
150
T
C
, Case Temperature ( ° C)
10%
V
GS
t
d(on)
t
r
t
d(off)
t
f
Fig 9.
Maximum Drain Current Vs.
Case Temperature
10
Fig 10b.
Switching Time Waveforms
Thermal Response(Z
thJC
)
1
D = 0.50
0.20
0.10
0.1
0.05
0.02
0.01
SINGLE PULSE
(THERMAL RESPONSE)
Notes:
1. Duty factor D = t
1
/ t
2
2. Peak T
J
= P
DM
x Z
thJC
+ T
C
0.0001
0.001
0.01
0.1
P
DM
t
1
t
2
0.01
0.00001
t
1
, Rectangular Pulse Duration (sec)
Fig 11.
Maximum Effective Transient Thermal Impedance, Junction-to-Case
2014-8-25
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