a
FEATURES
Fast, Flexible, Microprocessor Interfacing in Serially
Controlled Systems
Buffered Digital Output Pin for Daisy-Chaining
Multiple DACs
Minimizes Address-Decoding in Multiple DAC
Systems—Three-Wire Interface for Any Number of DACs
One Data Line
One CLK Line
One Load Line
Improved Resistance to ESD
–40 C to +85 C for the Extended Industrial Temperature
Range
APPLICATIONS
Multiple-Channel Data Acquisition Systems
Process Control and Industrial Automation
Test Equipment
Remote Microprocessor-Controlled Systems
GENERAL INFORMATION
12-Bit Serial Daisy-Chain
CMOS D/A Converter
DAC8143
FUNCTIONAL BLOCK DIAGRAM
V
DD
R
FB
DAC8143
V
REF
12-BIT
D/A CONVERTER
I
OUT1
I
OUT2
CLR
LD
1
LD
2
STB
1
STB
4
STB
3
STB
2
SRI
IN
CLK
INPUT 12-BIT
SHIFT REGISTER
OUT
SRO
AGND
DAC REGISTER
LOAD
DGND
The DAC8143 is a 12-bit serial-input daisy-chain CMOS D/A
converter that features serial data input and buffered serial data
output. It was designed for multiple serial DAC systems, where
serially daisy-chaining one DAC after another is greatly simplified.
The DAC8143 also minimizes address decoding lines enabling
simpler logic interfacing. It allows three-wire interface for any
number of DACs: one data line, one CLK line and one load line.
Serial data in the input register (MSB first) is sequentially
clocked out to the SRO pin as the new data word (MSB first) is
simultaneously clocked in from the SRI pin. The strobe inputs
are used to clock in/out data on the rising or falling (user
selected) strobe edges (STB
1
, STB
2
,
STB3,
STB
4
).
When the shift register’s data has been updated, the new data
word is transferred to the DAC register with use of
LD1
and
LD2
inputs.
Separate LOAD control inputs allow simultaneous output up-
dating of multiple DACs. An asynchronous CLEAR input
resets the DAC register without altering data in the input
register.
Improved linearity and gain error performance permits reduced
circuit parts count through the elimination of trimming compo-
nents. Fast interface timing reduces timing design considerations
while minimizing microprocessor wait states.
The DAC8143 is available in plastic packages that are compat-
ible with autoinsertion equipment.
Plastic packaged devices come in the extended industrial tem-
perature range of –40°C to +85°C.
REV. C
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 1999
WR
ADDRESS BUS
ADDRESS
DECODER
DB
X
SRI
STROBE
SRO LOAD
P
SRI
DAC8143
STROBE
SRO LOAD
DAC8143
SRI
STROBE
SRO LOAD
DAC8143
SRI
STROBE
SRO LOAD
DAC8143
Figure 1. Multiple DAC8143s with Three-Wire Interface
DAC8143–SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
Parameter
STATIC ACCURACY
Resolution
Nonlinearity
Differential Nonlinearity
1
Gain Error
2
Gain Tempco (∆Gain/∆Temp)
3
Power Supply Rejection Ratio
(∆Gain/∆V
DD
)
Output Leakage Current
4
Zero Scale Error
5, 6
Input Resistance
7
AC PERFORMANCE
Output Current Settling Time
3, 8
AC Feedthrough Error
(V
REF
to I
OUT1
)
3, 9
Digital-to-Analog Glitch Energy
3, 10
Total Harmonic Distortion
3
Output Noise Voltage Density
DIGITAL INPUTS/OUTPUT
Digital Input HIGH
Digital Input LOW
Input Leakage Current
12
Input Capacitance
Digital Output High
Digital Output Low
ANALOG OUTPUTS
Output Capacitance
3
Output Capacitance
3
TIMING CHARACTERISTICS
3
Serial Input to Strobe Setup Times
(t
STB
= 80 ns)
3, 11
(@ V
DD
= +5 V; V
REF
= +10 V; V
OUT1
= V
OUT2
= V
AGND
= V
DGND
= 0 V; T
A
= Full Temperature
Range specified under Absolute Maximum Ratings, unless otherwise noted.)
Conditions
Min
12
±
1
±
1
±
2
±
5
∆V
DD
=
±
5%
T
A
= +25°C
T
A
= Full Temperature Range
T
A
= +25°C
T
A
= Full Temperature Range
V
REF
Pin
±
0.0006
±
0.002
±
5
±
25
±
0.002
±
0.03
±
0.01
±
0.15
11
15
0.380
V
REF
= 20 V p-p @ f = 10 kHz, T
A
= +25°C
V
REF
= 0 V, I
OUT
Load = 100
Ω,
C
EXT
= 13 pF
V
REF
= 6 V rms @ 1 kHz
DAC Register Loaded with All 1s
10 Hz to 100 kHz Between R
FB
and I
OUT
2.4
V
IN
= 0 V to +5 V
V
IN
= 0 V
I
OH
= –200
µA
I
OL
= 1.6 mA
Digital Inputs = All 1s
Digital Inputs = All 0s
Digital Inputs = All 0s
Digital Inputs = All 1s
STB
1
Used as the Strobe
STB
2
Used as the Strobe
STB
3
Used as the Strobe T
A
= +25°C
T
A
= Full Temperature Range
STB
4
Used as the Strobe
STB
1
Used as the Strobe T
A
= +25°C
T
A
= Full Temperature Range
STB
2
Used as the Strobe T
A
= +25°C
T
A
= Full Temperature Range
STB
3
Used as the Strobe
STB
4
Used as the Strobe
50
20
10
20
20
40
50
50
60
80
80
0.8
±
1
8
4
0.4
90
90
60
60
1
2.0
20
–92
13
Typ
Max
Units
Bits
LSB
LSB
LSB
ppm/°C
%/%
nA
nA
LSB
LSB
kΩ
µs
mV p-p
nVs
dB
nV/√Hz
V
V
µA
pF
V
V
pF
pF
pF
pF
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Symbol
N
INL
DNL
G
FSE
TC
GFS
PSRR
I
LKG
I
ZSE
R
IN
t
S
FT
Q
THD
e
n
V
IH
V
IL
I
IN
C
IN
V
OH
V
OL
C
OUT1
C
OUT2
C
OUT1
C
OUT2
t
DS1
t
DS2
t
DS3
t
DS4
t
DH1
t
DH2
7
Serial Input to Strobe Hold Times
(t
STB
= 80 ns)
t
DH3
t
DH4
–2–
REV. C
DAC8143
ELECTRICAL CHARACTERISTICS
Parameter
STB to SRO Propagation Delay
13
SRI Data Pulsewidth
STB
1
Pulsewidth (STB1 = 80 ns)
14
STB
2
Pulsewidth (STB2 = 100 ns)
14
STB
3
Pulsewidth (STB3 = 80 ns)
14
STB
4
Pulsewidth (STB4 = 80 ns)
14
Load Pulsewidth
LSB Strobe into Input Register
to Load DAC Register Time
CLR Pulsewidth
POWER SUPPLY
Supply Voltage
Supply Current
Power Dissipation
(@ V
DD
= +5 V; V
REF
= +10 V; V
OUT1
= V
0UT2
= V
AGND
= V
DGND
= 0 V; T
A
= Full
Temperature Range specified under Absolute Maximum Ratings, unless otherwise noted.)
Symbol
t
PD
t
SRI
t
STB1
t
STB2
t
STB3
t
STB4
t
LD1
, t
LD2
Conditions
T
A
= +25°C
T
A
= Full Temperature Range
100
80
80
80
80
140
180
0
80
4.75
All Digital Inputs = V
IH
or V
IL
All Digital Inputs = 0 V or V
DD
Digital Inputs = 0 V or V
DD
5 V
×
0.1 mA
Digital Inputs = V
IH
or V
IL
5 V
×
2 mA
5
5.25
2
0.1
0.5
10
DAC8143
Min
Typ
Max
220
300
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
V
mA
mA
mW
mW
T
A
= +25°C
T
A
= Full Temperature Range
t
ASB
t
CLR
V
DD
I
DD
P
D
NOTES
11
All grades are monotonic to 12 bits over temperature.
12
Using internal feedback resistor.
13
Guaranteed by design and not tested.
14
Applies to I
OUT1
; all digital inputs = V
IL
, V
REF
= +10 V; specification also applies for I
OUT2
when all digital inputs = V
IH
.
15
V
REF
= +10 V, all digital inputs = 0 V.
16
Calculated from worst case R
REF
: I
ZSE
(in LSBs) = (R
REF
×
I
LKG
×
4096) /V
REF
.
17
Absolute temperature coefficient is less than +300 ppm/°C.
18
I
OUT
, Load = 100
Ω.
C
EXT
= 13 pF, digital input = 0 V to V
DD
or V
DD
to 0 V. Extrapolated to 1/2 LSB: t
S
= propagation delay (t
PD
) +9
τ,
where
τ
equals measured
time constant of the final RC decay.
19
All digital inputs = 0 V.
10
V
REF
= 0 V, all digital inputs = 0 V to V
DD
or V
DD
to 0 V.
11
Calculations from e
n
=
√4K
TRB
where:
K = Boltzmann constant, J/KR = resistance
Ω
T = resistor temperature, K B = bandwidth, Hz
12
Digital inputs are CMOS gates; I
IN
typically 1 nA at +25°C.
13
Measured from active strobe edge (STB) to new data output at SRO; C
L
= 50 pF.
14
Minimum low time pulsewidth for STB
1
, STB
2
, and STB
4
, and minimum high time pulsewidth for STB
3
.
Specifications subject to change without notice.
REV. C
–3–
DAC8143
ABSOLUTE MAXIMUM RATINGS
(T
A
= +25°C, unless otherwise noted.)
PIN CONNECTIONS
16-Lead Epoxy Plastic DIP
16-Lead SOIC
V
DD
to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +17 V
V
REF
to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±
25 V
V
RFB
to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±
25 V
AGND to DGND . . . . . . . . . . . . . . . . . . . . . . . . V
DD
+ 0.3 V
DGND to AGND . . . . . . . . . . . . . . . . . . . . . . . . V
DD
+ 0.3 V
Digital Input Voltage Range . . . . . . . . . . . . . . . –0.3 V to V
DD
Output Voltage (Pin 1, Pin 2) . . . . . . . . . . . . . . –0.3 V to V
DD
Operating Temperature Range
FP/FS Versions . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . +150°C
Storage Temperature . . . . . . . . . . . . . . . . . . –65°C to +150°C
Lead Temperature (Soldering, 60 sec) . . . . . . . . . . . . +300°C
Package Type
16-Lead Plastic DIP
16-Lead SOIC
JA
*
JC
I
OUT1 1
I
OUT2 2
AGND
3
STB
1 4
16
R
FB
15
V
REF
14
V
DD
13
CLR
TOP VIEW
LD
1 5
(Not to Scale)
12
DGND
SRO
6
11
STB
4
DAC8143
SRI
7
STB
2 8
10
STB
3
9
LD
2
Units
°C/W
°C/W
76
92
33
27
*θ
JA
is specified for worst case mounting conditions, i.e.,
θ
JA
is specified for
device in socket for P-DIP package;
θ
JA
is specified for device soldered to
printed circuit board for SOIC package.
CAUTION
1. Do not apply voltage higher than V
DD
or less than DGND po-
tential on any terminal except V
REF
(Pin 15) and R
FB
(Pin 16).
2. The digital control inputs are Zener-protected; however,
permanent damage may occur on unprotected units from
high energy electrostatic fields. Keep units in conductive
foam at all times until ready to use.
3. Use proper antistatic handling procedures.
4. Absolute Maximum Ratings apply to packaged devices.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device.
ORDERING GUIDE
Model
DAC8143FP
DAC8143FS
Nonlinearity
±
1 LSB
±
1 LSB
Gain
Error
±
2 LSB
±
2 LSB
Temperature
Range
–40°C to +85°C
–40°C to +85°C
Package
Descriptions
16-Lead Plastic DIP
16-Lead SOIC
Package
Options
N-16
R-16W
Die Size: 99
×
107 mil, 10,543 sq. mils.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the DAC8143 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
–4–
REV. C
Typical Performance Characteristics– DAC8143
ALL BITS ON
(MSB) B11
B10
B9
B8
B7
DATA BITS "ON"
B6
(ALL OTHER
B5
DATA BITS "OFF")
B4
B3
B2
B1
(LSB) B0
0
12
24
36
48
60
72
84
96
100
1k
10k
100k
FREQUENCY – Hz
1M
108
10M
–95
10
100
1k
10k
FREQUENCY – Hz
0.0018
100k
ATTENUATION – dB
–70
V
IN
= 5V rms
OUTPUT OP AMP: OP-42
–75
0.032
0.018
THD – dB
–85
0.0056
–90
0.0032
Figure 2. Multiplying Mode Frequency
Response vs. Digital Code
Figure 3. Multiplying Mode Total Harmonic
Distortion vs. Frequency
3
0.5
0.4
LINEARITY ERROR – LSB
0.5
0.3
0.25
0.2
0.1
0.0
–0.1
–0.2
–0.3
–0.4
–0.25
INL – LSB
2
I
DD
– mA
0
1
0
0
1
2
3
V
IN
– Volts
4
5
–0.5
0
512 1024 1536 2048 2560 3072 3584 4095
DIGITAL INPUT CODE – Decimal
–0.5
2
4
6
V
REF
– Volts
THD – %
–80
0.010
8
10
Figure 4. Supply Current vs. Logic
Input Voltage
Figure 5. Linearity Error vs. Digital
Code
Figure 6. Linearity Error vs. Refer-
ence Voltage
4
THRESHOLD VOLTAGE – Volts
0.5
40
T
A
= +25 C
30
LOGIC 0
3
2.4
2
DNL – LSB
0.25
OUTPUT CURRENT – mA
SOURCE
SINK
20
10
0
–10
LOGIC 1
–20
–30
–40
0
1
–0.8
–0.25
0
1
3
5
7
9
11
V
DD
– Volts
13
15
17
–0.5
2
4
6
V
REF
– Volts
8
10
0
1
2
3
4
SRO – VOLTAGE OUT – Volts
5
Figure 7. Logic Threshold Voltage
vs. Supply Voltage
Figure 8. DNL Error vs. Reference
Voltage
Figure 9. Digital Output Voltage vs.
Output Current
REV. C
–5–
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