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LY62L256RN-55LI

Description
SRAM,
Categorystorage    storage   
File Size222KB,13 Pages
ManufacturerLyontek
Websitehttp://www.lyontek.com.tw/index.html
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LY62L256RN-55LI Overview

SRAM,

LY62L256RN-55LI Parametric

Parameter NameAttribute value
MakerLyontek
package instruction,
Reach Compliance Codecompliant

LY62L256RN-55LI Preview

®
LY62L256
Rev. 1.1
32K X 8 BIT LOW POWER CMOS SRAM
REVISION HISTORY
Revision
Rev. 1.0
Rev. 1.1
Description
Initial Issue
Revised
STSOP Package Outline Dimension
Issue Date
Jul.25.2004
Mar.26.2008
40 Hsuch-Fu Rd., Hsinchu, Taiwan.
TEL: 886-3-5165511
FAX: 886-3-5165522
Lyontek Inc.
reserves the rights to change the specifications and products without notice.
0
®
LY62L256
Rev. 1.1
32K X 8 BIT LOW POWER CMOS SRAM
GENERAL DESCRIPTION
The LY62L256 is a 262,144-bit low power CMOS
static random access memory organized as 32,768
words by 8 bits. It is fabricated using very high
performance, high reliability CMOS technology. Its
standby current is stable within the range of
operating temperature.
The LY62L256 is well designed for low power
application, and particularly well suited for battery
back-up nonvolatile memory application.
The LY62L256 operates from a single power
supply of 2.7V ~ 3.6V and all inputs and outputs are
fully TTL compatible
FEATURES
Fast access time : 35/55/70ns
Low power consumption:
Operating current : 20/15/10mA (TYP.)
Standby current : 1μA (TYP.) L-version
0.5μA (TYP.) LL-version
Single 2.7V ~ 3.6V power supply
All inputs and outputs TTL compatible
Fully static operation
Tri-state output
Data retention voltage : 1.5V (MIN.)
Lead free and green package available
Package : 28-pin 600 mil PDIP
28-pin 330 mil SOP
28-pin 8mm x 13.4mm STSOP
PRODUCT FAMILY
Product
Family
LY62L256
LY62L256(E)
LY62L256(I)
Operating
Temperature
0 ~ 70℃
-20 ~ 80℃
-40 ~ 85℃
Vcc Range
2.7 ~ 3.6V
2.7 ~ 3.6V
2.7 ~ 3.6V
Speed
35/55/70ns
35/55/70ns
35/55/70ns
Power Dissipation
Standby(I
SB1,
TYP.) Operating(Icc,TYP.)
1µA(L)/0.5µA(LL)
20/15/10mA
1µA(L)/0.5µA(LL)
20/15/10mA
1µA(L)/0.5µA(LL)
20/15/10mA
FUNCTIONAL BLOCK DIAGRAM
PIN DESCRIPTION
SYMBOL
DESCRIPTION
Address Inputs
Data Inputs/Outputs
Chip Enable Input
Write Enable Input
Output Enable Input
Power Supply
Ground
Vcc
Vss
A0 - A14
DQ0 – DQ7
DECODER
32Kx8
MEMORY ARRAY
CE#
WE#
OE#
V
CC
V
SS
A0-A14
DQ0-DQ7
I/O DATA
CIRCUIT
COLUMN I/O
CE#
WE#
OE#
CONTROL
CIRCUIT
40 Hsuch-Fu Rd., Hsinchu, Taiwan.
TEL: 886-3-5165511
FAX: 886-3-5165522
Lyontek Inc.
reserves the rights to change the specifications and products without notice.
1
®
LY62L256
Rev. 1.1
32K X 8 BIT LOW POWER CMOS SRAM
PIN CONFIGURATION
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
Vss
1
2
3
4
5
6
7
8
9
10
11
12
13
14
PDIP/SOP
28
27
26
25
24
23
22
21
20
19
18
17
16
15
Vcc
WE#
A13
A8
A9
A11
OE#
A10
CE#
DQ7
DQ6
DQ5
DQ4
DQ3
OE#
A11
A9
A8
A13
WE#
Vcc
A14
A12
A7
A6
A5
A4
A3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
A10
CE#
DQ7
DQ6
DQ5
DQ4
DQ3
Vss
DQ2
DQ1
DQ0
A0
A1
A2
ABSOLUTE MAXIMUN RATINGS*
PARAMETER
Terminal Voltage with Respect to V
SS
Operating Temperature
Storage Temperature
Power Dissipation
DC Output Current
Soldering Temperature (under 10 sec)
SYMBOL
V
TERM
T
A
T
STG
P
D
I
OUT
T
SOLDER
RATING
-0.5 to 4.6
0 to 70(C grade)
-20 to 80(E grade)
-40 to 85(I grade)
-65 to 150
1
50
260
UNIT
V
W
mA
*Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress
rating only and functional operation of the device or any other conditions above those indicated in the operational sections of this
specification is not implied. Exposure to the absolute maximum rating conditions for extended period may affect device reliability.
LY62L256
LY62L256
STSOP
TRUTH TABLE
MODE
Standby
Output Disable
Read
Write
Note:
CE#
H
L
L
L
OE#
X
H
L
X
WE#
X
H
H
L
I/O OPERATION
High-Z
High-Z
D
OUT
D
IN
SUPPLY CURRENT
I
SB
,I
SB1
I
CC
,I
CC1
I
CC
,I
CC1
I
CC
,I
CC1
H = V
IH
, L = V
IL
, X = Don't care.
40 Hsuch-Fu Rd., Hsinchu, Taiwan.
TEL: 886-3-5165511
FAX: 886-3-5165522
Lyontek Inc.
reserves the rights to change the specifications and products without notice.
2
®
LY62L256
Rev. 1.1
32K X 8 BIT LOW POWER CMOS SRAM
DC ELECTRICAL CHARACTERISTICS
SYMBOL
TEST CONDITION
PARAMETER
Supply Voltage
V
CC
*1
Input High Voltage
V
IH
*2
Input Low Voltage
V
IL
Input Leakage Current
I
LI
V
CC
V
IN
V
SS
Output Leakage
V
CC
V
OUT
V
SS
,
I
LO
Current
Output Disabled
Output High Voltage
V
OH
I
OH
= -1mA
Output Low Voltage
V
OL
I
OL
= 2mA
I
CC
Average Operating
Power supply Current
I
CC1
Standby Power
Supply Current
I
SB
I
SB1
Cycle time = Min.
CE# = V
IL
, I
I/O
= 0mA
-35
-55
-70
MIN.
2.7
2.0
- 0.5
-1
-1
2.4
-
-
-
-
-
-
-
-
TYP.
3.3
-
-
-
-
3.0
-
20
15
10
3
1
1
0.5
*5
MAX.
3.6
V
CC
+0.5
0.6
1
1
-
0.4
40
30
20
6
3
40
*4
20
UNIT
V
V
V
µA
µA
V
V
mA
mA
mA
mA
mA
µA
µA
Cycle time = 1µs
CE#
0.2V and I
I/O
= 0mA
other pins at 0.2V or V
CC
-0.2V
CE# = V
IH
-L
CE#
V
CC
- 0.2V
-LL
Notes:
1. V
IH
(max) = V
CC
+ 3.0V for pulse width less than 10ns.
2. V
IL
(min) = V
SS
- 3.0V for pulse width less than 10ns.
3. Over/Undershoot specifications are characterized, not 100% tested.
4. 10µA for special request
5. Typical values are included for reference only and are not guaranteed or tested.
Typical valued are measured at V
CC
= V
CC
(TYP.) and T
A
= 25℃
CAPACITANCE
(T
A
= 25
, f = 1.0MHz)
PARAMETER
Input Capacitance
Input/Output Capacitance
SYMBOL
C
IN
C
I/O
MIN.
-
-
MAX
6
8
UNIT
pF
pF
Note : These parameters are guaranteed by device characterization, but not production tested.
AC TEST CONDITIONS
Input Pulse Levels
Input Rise and Fall Times
Input and Output Timing Reference Levels
Output Load
0.2V to V
CC
- 0.2V
3ns
1.5V
C
L
= 30pF + 1TTL, I
OH
/I
OL
= -1mA/2mA
40 Hsuch-Fu Rd., Hsinchu, Taiwan.
TEL: 886-3-5165511
FAX: 886-3-5165522
Lyontek Inc.
reserves the rights to change the specifications and products without notice.
3
®
LY62L256
Rev. 1.1
32K X 8 BIT LOW POWER CMOS SRAM
AC ELECTRICAL CHARACTERISTICS
(1) READ CYCLE
PARAMETER
Read Cycle Time
Address Access Time
Chip Enable Access Time
Output Enable Access Time
Chip Enable to Output in Low-Z
Output Enable to Output in Low-Z
Chip Disable to Output in High-Z
Output Disable to Output in High-Z
Output Hold from Address Change
(2) WRITE CYCLE
PARAMETER
Write Cycle Time
Address Valid to End of Write
Chip Enable to End of Write
Address Set-up Time
Write Pulse Width
Write Recovery Time
Data to Write Time Overlap
Data Hold from End of Write Time
Output Active from End of Write
Write to Output in High-Z
SYM.
t
RC
t
AA
t
ACE
t
OE
t
CLZ
*
t
OLZ
*
t
CHZ
*
t
OHZ
*
t
OH
LY62L256-35
MIN.
MAX.
35
-
-
35
-
35
-
25
10
-
5
-
-
15
-
15
10
-
LY62L256-55
MIN.
MAX.
55
-
-
55
-
55
-
30
10
-
5
-
-
20
-
20
10
-
LY62L256-70
MIN.
MAX.
70
-
-
70
-
70
-
35
10
-
5
-
-
25
-
25
10
-
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
SYM.
t
WC
t
AW
t
CW
t
AS
t
WP
t
WR
t
DW
t
DH
t
OW
*
t
WHZ
*
LY62L256-35
MIN.
MAX.
35
-
30
-
30
-
0
-
25
-
0
-
20
-
0
-
5
-
-
15
LY62L256-55
MIN.
MAX.
55
-
50
-
50
-
0
-
45
-
0
-
25
-
0
-
5
-
-
20
LY62L256-70
MIN.
MAX.
70
-
60
-
60
-
0
-
55
-
0
-
30
-
0
-
5
-
-
25
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
*These parameters are guaranteed by device characterization, but not production tested.
40 Hsuch-Fu Rd., Hsinchu, Taiwan.
TEL: 886-3-5165511
FAX: 886-3-5165522
Lyontek Inc.
reserves the rights to change the specifications and products without notice.
4

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Description SRAM, SRAM, SRAM, SRAM, SRAM, SRAM,
Maker Lyontek Lyontek Lyontek Lyontek Lyontek Lyontek
Reach Compliance Code compliant compliant compliant compliant compliant compliant

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