Energy Metering IC with Integrated
Oscillator and No-Load Indication
ADE7769
FEATURES
On-chip oscillator as clock source
High accuracy, supports 50 Hz/60 Hz IEC62053-21
Less than 0.1% error over a dynamic range of 500 to 1
Supplies average real power on frequency outputs F1 and F2
High frequency output CF calibrates and supplies
instantaneous real power
CF output remains logic high when ADE7769 is under
no-load threshold
Logic output REVP indicates a potential miswiring or
negative power
Direct drive for electromechanical counters and 2-phase
stepper motors (F1 and F2)
Proprietary ADCs and DSPs provide high accuracy over
large variations in environmental conditions and time
On-chip power supply monitoring
On-chip creep protection (no-load threshold)
On-chip reference 2.45 V (20 ppm/°C typical) with external
overdrive capability
Single 5 V supply, low power (20 mW typical)
Low cost CMOS process
The ADE7769 specifications surpass the accuracy require-
ments of the IEC62053-21 standard. The
AN-679 Application
Note
can be used as a basis for a description of an IEC61036
(equivalent to IEC62053-21) low cost, watt-hour meter
reference design.
The only analog circuitry used in the ADE7769 is in the Σ-Δ
ADCs and reference circuit. All other signal processing, such as
multiplication and filtering, is carried out in the digital domain.
This approach provides superior stability and accuracy over
time and extreme environmental conditions.
The ADE7769 supplies average real power information on the
low frequency outputs, F1 and F2. These outputs can be used to
directly drive an electromechanical counter or interface with an
MCU. The high frequency CF logic output, ideal for calibration
purposes, provides instantaneous real power information.
The ADE7769 includes a power supply monitoring circuit on
the V
DD
supply pin. The ADE7769 remains inactive until the
supply voltage on V
DD
reaches approximately 4 V. If the supply
falls below 4 V, the ADE7769 also remains inactive and the F1,
F2, and CF outputs are in their nonactive modes.
Internal phase matching circuitry ensures that the voltage and
current channels are phase matched, while the HPF in the
current channel eliminates dc offsets. An internal no-load
threshold ensures that the ADE7769 does not exhibit creep
when no load is present. During a no-load condition, the CF
pin stays logic high.
The ADE7769 has a 16-lead, narrow body SOIC package.
GENERAL DESCRIPTION
The ADE7769
1
is a high accuracy electrical energy metering IC.
It is a pin reduction version of the ADE7755 with an enhanced,
precise oscillator circuit that serves as a clock source to the chip.
The ADE7769 eliminates the cost of an external crystal or
resonator, thus reducing the overall cost of a meter built with
this IC. The chip directly interfaces with the shunt resistor.
1
U.S. Patents 5,745,323; 5,760,617; 5,862,069; 5,872,469; others pending.
FUNCTIONAL BLOCK DIAGRAM
V
DD
1
AGND
6
DGND
13
ADE7769
POWER
SUPPLY MONITOR
V2P
2
V2N
3
+
Σ-Δ
ADC
...110101...
MULTIPLIER
PHASE
CORRECTION
V1N
4
V1P
5
+
Σ-Δ
ADC
...11011001...
Φ
HPF
DIGITAL-TO-FREQUENCY
CONVERTER
05332-001
SIGNAL
PROCESSING
BLOCK
LPF
INTERNAL
OSCILLATOR
2.5V
REFERENCE
4kΩ
7
11
8
10
9
12
14
16
15
REF
IN/OUT
RCLKIN
SCF
S0
S1 REVP CF
F1
F2
Figure 1.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
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Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
© 2005 Analog Devices, Inc. All rights reserved.
ADE7769
TABLE OF CONTENTS
Specifications..................................................................................... 3
Timing Characteristics ................................................................ 4
Absolute Maximum Ratings............................................................ 5
ESD Caution.................................................................................. 5
Terminology ...................................................................................... 6
Pin Configuration and Function Descriptions............................. 7
Typical Performance Characteristics ............................................. 8
Functional Description .................................................................. 10
Theory of Operation .................................................................. 10
Analog Inputs.............................................................................. 11
Power Supply Monitor ............................................................... 12
Internal Oscillator (OSC).......................................................... 14
Transfer Function....................................................................... 14
Selecting a Frequency for an Energy Meter Application ...... 15
No-Load Threshold.................................................................... 16
Negative Power Information..................................................... 16
Evaluation Board and Reference Design Board ..................... 16
Outline Dimensions ....................................................................... 17
Ordering Guide .......................................................................... 17
REVISION HISTORY
8/05—Sp0 to Rev. A
Rev. A | Page 2 of 20
ADE7769
SPECIFICATIONS
V
DD
= 5 V ± 5%, AGND = DGND = 0 V, on-chip reference, RCLKIN = 6.2 kΩ, 0.5% ± 50 ppm/°C, T
MIN
to T
MAX
= −40°C to +85°C,
unless otherwise noted.
Table 1.
Parameter
ACCURACY
1
,
2
Measurement Error
1
on Channel V1
Value
0.1
Unit
% reading typ
Test Conditions/Comments
Channel V2 with full-scale signal (±165 mV),
25°C over a dynamic range 500 to 1,
line frequency = 45 Hz to 65 Hz
Phase Error
1
Between Channels
V1 Phase Lead 37° (PF = 0.8 Capacitive)
V1 Phase Lag 60° (PF = 0.5 Inductive)
AC Power Supply Rejection
1
Output Frequency Variation (CF)
DC Power Supply Rejection
1
Output Frequency Variation (CF)
ANALOG INPUTS
Channel V1 Maximum Signal Level
Channel V2 Maximum Signal Level
Input Impedance (DC)
Bandwidth (–3 dB)
ADC Offset Error
1, 2
Gain Error
1
OSCILLATOR FREQUENCY (OSC)
Oscillator Frequency Tolerance
1
Oscillator Frequency Stability
1
REFERENCE INPUT
REF
IN/OUT
Input Voltage Range
Input Capacitance
ON-CHIP REFERENCE
Reference Error
Temperature Coefficient
LOGIC INPUTS
3
SCF, S0, S1
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Current, I
IN
Input Capacitance, C
IN
LOGIC OUTPUTS
3
F1 and F2
Output High Voltage, V
OH
Output Low Voltage, V
OL
CF
Output High Voltage, V
OH
Output Low Voltage, V
OL
Frequency Output Error
1, 2
(CF)
±0.1
±0.1
0.2
Degrees (°) max
Degrees (°) max
% reading typ
S0 = S1 = 1, V1 = 21.2 mV rms, V2 = 116.7 mV rms @
50 Hz, ripple on V
DD
of 200 mV rms @ 100 Hz
S0 = S1 = 1, V1 = 21.2 mV rms, V2 = 116.7 mV rms,
V
DD
= 5 V ± 250 mV
See the Analog Inputs section
V1P and V1N to AGND
V2P and V2N to AGND
OSC = 450 kHz, RCLKIN = 6.2 kΩ, 0.5% ± 50 ppm/°C
OSC = 450 kHz, RCLKIN = 6.2 kΩ, 0.5% ± 50 ppm/°C
See the Terminology and Typical Performance
Characteristics sections
External 2.5 V reference, V1 = 21.2 mV rms,
V2 = 116.7 mV rms
RCLKIN = 6.2 kΩ, 0.5% ± 50 ppm/°C
±0.3
% reading typ
±30
±165
320
7
±18
±4
450
±12
±30
2.65
2.25
10
±200
±20
mV max
mV max
kΩ min
kHz nominal
mV max
% ideal typ
kHz nominal
% reading typ
ppm/°C typ
V max
V min
pF max
mV max
ppm/°C typ
2.45 V nominal
2.45 V nominal
2.45 V nominal
2.4
0.8
±1
10
V min
V max
μA max
pF max
V
DD
= 5 V ± 5%
V
DD
= 5 V ± 5%
Typically 10 nA, V
IN
= 0 V to V
DD
4.5
0.5
4
0.5
±10
V min
V max
V min
V max
% ideal typ
I
SOURCE
= 10 mA, V
DD
= 5 V, I
SINK
= 10 mA, V
DD
= 5 V
I
SOURCE
= 5 mA, V
DD
= 5 V, I
SINK
= 5 mA, V
DD
= 5 V
External 2.5 V reference, V1 = 21.2 mV rms,
V2 = 116.7 mV rms
Rev. A | Page 3 of 20
ADE7769
Parameter
POWER SUPPLY
V
DD
I
DD
1
2
Value
4.75
5.25
5
Unit
V min
V max
mA max
Test Conditions/Comments
For specified performance
5 V – 5%
5 V + 5%
Typically 4 mA
See the Terminology section for an explanation of specifications.
See the figures in the Typical Performance Characteristics section.
3
Sample tested during initial release and after any redesign or process change that may affect this parameter.
TIMING CHARACTERISTICS
V
DD
= 5 V ± 5%, AGND = DGND = 0 V, on-chip reference, RCLKIN = 6.2 kΩ, 0.5% ± 50 ppm/°C, T
MIN
to T
MAX
= −40°C to +85°C,
unless otherwise noted. Sample tested during initial release and after any redesign or process change that may affect this parameter.
See Figure 2.
Table 2.
Parameter
t
1 1
t
2
t
3
t
41, 2
t
5
t
6
1
2
Specifications
120
See Table 6
1/2 t
2
90
See Table 7
2
Unit
ms
sec
sec
ms
sec
μs
Test Conditions/Comments
F1 and F2 pulse width (logic low).
Output pulse period. See the Transfer Function section.
Time between the F1 and F2 falling edges.
CF pulse width (logic high).
CF pulse period. See the Transfer Function section.
Minimum time between the F1 and F2 pulses.
The pulse widths of F1, F2, and CF are not fixed for higher output frequencies. See the Frequency Outputs section.
The CF pulse is always 35 μs in high frequency mode. See the Frequency Outputs section and Table 7.
t
1
F1
t
6
t
2
F2
t
3
t
4
t
5
05332-002
CF
Figure 2. Timing Diagram for Frequency Outputs
Rev. A | Page 4 of 20
ADE7769
ABSOLUTE MAXIMUM RATINGS
T
A
= 25°C, unless otherwise noted.
Table 3.
Parameter
V
DD
to AGND
V
DD
to DGND
Analog Input Voltage to AGND,
V1P, V1N, V2P, and V2N
Reference Input Voltage to AGND
Digital Input Voltage to DGND
Digital Output Voltage to DGND
Operating Temperature Range
Storage Temperature Range
Junction Temperature
16-Lead Plastic SOIC, Power Dissipation
θ
JA
Thermal Impedance
1
Package Temperature Soldering
1
Value
−0.3 V to +7 V
–0.3 V to +7 V
–6 V to +6 V
–0.3 V to V
DD
+ 0.3 V
–0.3 V to V
DD
+ 0.3 V
–0.3 V to V
DD
+ 0.3 V
–40°C to +85°C
–65°C to +150°C
150°C
350 mW
124.9°C/W
See J-STD-20
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or
any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
JEDEC 1S standard (2-layer) board data.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degrada-
tion or loss of functionality.
Rev. A | Page 5 of 20