Logic Level N-Ch Power MOSFET
SMN630LD
200V LOGIC N-Channel MOSFET
Features
Drain-Source breakdown voltage: BV
DSS
=200V (Min.)
Low gate charge: Q
g
=12nC (Typ.)
Low drain-source On-Resistance: R
DS(on)
=0.34Ω (Typ.)
100% avalanche tested
RoHS compliant device
D
Ordering Information
Part Number
SMN630LD
Marking
SMN630L
Package
TO-252
G
S
TO-252
Marking Information
SMN
630L
YWW
Column 1, 2: Device Code
Column 3: Production Information
e.g.) YWW
-. YWW: Date Code (year, week)
Absolute maximum ratings
Characteristic
Drain-source voltage
Gate-source voltage
Drain current (DC)
*
Drain current (Pulsed)
Avalanche current
*
(T
C
=25C unless otherwise noted)
Symbol
V
DSS
V
GSS
I
D
T
c
=25C
T
c
=100C
I
DM
I
AS
(Note 2)
Rating
200
20
9
5.7
36
9
216
9
4.5
45
150
-55~150
Unit
V
V
A
A
A
A
mJ
A
mJ
W
C
C
(Note 2)
Single pulsed avalanche energy
Repetitive avalanche current
Repetitive avalanche energy
Power dissipation
Junction temperature
Storage temperature range
E
AS
I
AR
E
AR
P
D
T
J
T
stg
(Note 1)
(Note 1)
* Limited only maximum junction temperature
Rev. date: 13-AUG-14
KSD-T6O052-000
www.auk.co.kr
1 of 8
SMN630LD
Thermal Characteristics
Characteristic
Thermal resistance, junction to case
Thermal resistance, junction to ambient
Symbol
R
th(j-c)
R
th(j-a)
Rating
Max. 2.77
Max. 50
Unit
C/W
Electrical Characteristics
(T
C
=25C unless otherwise noted)
Characteristic
Drain-source breakdown voltage
Gate threshold voltage
Drain-source cut-off current
Gate leakage current
Drain-source on-resistance
Forward transfer conductance
Input capacitance
Output capacitance
Reverse transfer capacitance
Turn-on delay time
Rise time
(Note 3,4)
(Note 3,4)
(Note 3,4)
(Note 3)
Symbol
BV
DSS
V
GS(th)
I
DSS
I
GSS
R
DS(ON)
g
fs
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
Test Condition
I
D
=250uA, V
GS
=0
I
D
=250uA, V
DS
=V
GS
V
DS
=200V, V
GS
=0V
V
DS
=0V, V
GS
=20V
V
GS
=10V, I
D
=4.5A
V
GS
=5V, I
D
=4.5A
V
DS
=10V, I
D
=4.5A
V
DS
=25V, V
GS
=0V,
f=1MHz
Min.
200
1
-
-
-
-
-
-
-
-
-
Typ.
-
-
-
-
0.34
0.37
5.5
575
84
10.5
20
79
155
42
12
3
2
Max.
-
2.5
1
100
0.4
0.44
-
804
112
15
-
-
-
-
17
-
-
Unit
V
V
uA
nA
S
pF
Turn-off delay time
Fall time
(Note 3,4)
V
DD
=100V, I
D
=9A
R
G
=25Ω
-
-
-
-
ns
Total gate charge
(Note 3,4)
(Note 3,4)
Q
g
Q
gs
Q
gd
V
DS
=160V, V
GS
=10V
I
D
=9A
Gate-source charge
Gate-drain charge
-
-
nC
(Note 3,4)
Source-Drain Diode Ratings and Characteristics
(T
C
=25C unless otherwise noted)
Characteristic
Source current (DC)
Source current (Pulsed)
Forward voltage
Reverse recovery time
(Note 3,4)
(Note 3,4)
Symbol
I
S
I
SM
V
SD
t
rr
Q
rr
Test Condition
Integral reverse diode
in the MOSFET
V
GS
=0V, I
S
=9A
I
S
=9A, V
GS
=0V
dI
S
/dt=100A/us
Min.
-
-
-
-
-
Typ.
-
-
-
125
0.5
Max.
9
36
1.5
-
-
Unit
A
A
V
ns
uC
Reverse recovery charge
Note:
1. Repeated rating: Pulse width limited by safe operating area
2. L=4mH, I
AS
=9A, V
DD
=50V, R
G
=25, Starting T
J
=25C
3. Pulse test: Pulse width≤300us, Duty cycle≤2%
4. Essentially independent of operating temperature typical characteristics
Rev. date: 13-AUG-14
KSD-T6O052-000
www.auk.co.kr
2 of 8
SMN630LD
Typical Characteristics Curves
Fig. 1 I
D
- V
DS
Fig. 2 I
D
– V
GS
Fig. 3 R
DS(ON)
- I
D
Fig. 4 I
S
- V
SD
Fig. 5 Capacitance - V
DS
Fig. 6 V
GS
- Q
G
Rev. date: 13-AUG-14
KSD-T6O052-000
www.auk.co.kr
3 of 8
SMN630LD
Fig. 7 BV
DSS
- T
J
Fig. 8 R
DS(on)
– T
J
Fig. 9 I
D
- T
C
Fig. 10 Safe Operating Area
Fig. 11 Transient Thermal Impedance
Rev. date: 13-AUG-14
KSD-T6O052-000
www.auk.co.kr
4 of 8
SMN630LD
Fig. 12 Gate Charge Test Circuit & Waveform
Fig. 13 Resistive Switching Test Circuit & Waveform
Fig. 14 E
AS
Test Circuit & Waveform
Rev. date: 13-AUG-14
KSD-T6O052-000
www.auk.co.kr
5 of 8
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