600 MHz, 32 × 32 Buffered
Analog Crosspoint Switch
AD8117/AD8118
FEATURES
High channel count, 32 × 32 high speed, non-blocking
switch array
Differential or single-ended operation
Differential G = +1 (AD8117) or G = +2 (AD8118)
Flexible power supplies
Single +5 V supply, or dual ±2.5 V supplies
Serial or parallel programming of switch array
High impedance output disable allows connection of
multiple devices with minimal loading on output bus
Excellent video performance
>50 MHz 0.1 dB gain flatness
0.05%/0.05° differential gain/phase error (R
L
= 150 Ω)
Excellent ac performance
Bandwidth: 600 MHz
Slew rate: 1800 V/μs
Settling time: 2.5 ns to 1%
Low power of 2.5 W
Low all hostile crosstalk
< −70 dB @ 5 MHz
< −43 dB @ 600 MHz
Reset pin allows disabling of all outputs (connected through
a capacitor to ground provides power-on reset capability)
304-ball BGA package (31 mm × 31 mm)
FUNCTIONAL BLOCK DIAGRAM
D0 D1 D2 D3 D4 D5
VDD
DGND
A0
A1
A2
A3
A4
192-BIT SHIFT REGISTER
WITH 6-BIT
PARALLEL LOADING
192
UPDATE
RESET
192
DECODE
32 × 6:32 DECODERS
INPUT
RECEIVER
G = +1*
G = +2**
2
1024
32
PARALLEL LATCH
DATA
OUT
AD8117/
AD8118
SER/PAR
WE
CLK
DATA IN
1
0
OUTPUT
BUFFER
G = +1
ENABLE/DISABLE
SET INDIVIDUAL, OR
RESET ALL OUTPUTS TO OFF
2
SWITCH
MATRIX
APPLICATIONS
Routing of high speed signals including
RGB and component video routing
KVM
Compressed video (MPEG, wavelet)
Data communications
*AD8117 ONLY
**AD8118 ONLY
VPOS
VNEG
VOCM
06365-001
Figure 1.
GENERAL DESCRIPTION
The AD8117/AD8118 are high speed, 32 × 32 analog crosspoint
switch matrices. They offer 600 MHz bandwidth and slew rate of
1800 V/μs for high resolution computer graphics (RGB) signal
switching. With less than −70 dB of crosstalk and −90 dB
isolation (@ 5 MHz), the AD8117/AD8118 are useful in many
high speed applications. The 0.1 dB flatness greater than
50 MHz makes the AD8117/AD8118 ideal for composite video
switching.
The AD8117/AD8118 include 32 independent output buffers
that can be placed into a high impedance state for paralleling
crosspoint outputs so that off-channels present minimal loading
to an output bus. The AD8117 has a differential gain of +1,
while the AD8118 has a differential gain of +2 for ease of use in
back-terminated load applications. They operate as fully
differential devices or can be configured for single-ended
operation. Either a single +5 V supply or dual ±2.5 V supplies
can be used, while consuming only 500 mA of idle current with
all outputs enabled. The channel switching is performed via a
double-buffered, serial digital control (which can accommodate
daisy chaining of several devices), or via a parallel control,
allowing updating of an individual output without reprogram-
ming the entire array.
The AD8117/AD8118 are packaged in a 304-ball BGA package
and are available over the extended industrial temperature
range of −40°C to +85°C.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2007 Analog Devices, Inc. All rights reserved.
32 OUTPUT PAIRS
32 INPUT PAIRS
AD8117/AD8118
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Timing Characteristics (Serial Mode) ....................................... 5
Timing Characteristics (Parallel Mode) .................................... 6
Absolute Maximum Ratings............................................................ 7
Thermal Resistance ...................................................................... 7
Power Dissipation......................................................................... 7
ESD Caution...................................................................................7
Pin Configuration and Function Descriptions..............................8
Truth Table and Logic Diagram ............................................... 13
I/O Schematics................................................................................ 15
Typical Performance Characteristics ........................................... 17
Theory of Operation ...................................................................... 25
Applications..................................................................................... 26
Programming.............................................................................. 26
Operating Modes........................................................................ 27
Outline Dimensions ....................................................................... 36
Ordering Guide .......................................................................... 36
REVISION HISTORY
5/07—Rev. 0 to Rev. A
Added AD8118 ...................................................................Universal
Changes to Data Sheet Title ........................................................... 1
Changes to Table 1............................................................................ 3
2/07—Revision 0: Initial Version
Rev. A | Page 2 of 36
Analogue and Mixed Signal
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