FX-700-DAE-PNKA-BW-A2 datasheet, PDF

Datasheet> All Categories > Wireless rf/communication> Telecom circuit> FX-700-DAE-PNKA-BW-A2

FX-700-DAE-PNKA-BW-A2: DescriptionATM/SONET/SDH Support Circuit, 1-Func, CQCC16, SMD-16; CategoryWireless rf/communication Telecom circuit; File Size730KB，8 Pages; ManufacturerVectron International, Inc.; Websitehttp://www.vectron.com/; Environmental Compliance

Download Datasheet Parametric View All

FX-700-DAE-PNKA-BW-A2 Overview

ATM/SONET/SDH Support Circuit, 1-Func, CQCC16, SMD-16

FX-700-DAE-PNKA-BW-A2 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	Vectron International, Inc.
package instruction	QCCN, LCC16,.3x.2,40
Reach Compliance Code	compliant
Other features	also works in 5v nominal supply voltage
app	ATM;SDH;SONET
JESD-30 code	R-CQCC-N16
JESD-609 code	e4
length	7.49 mm
Humidity sensitivity level	1
Number of functions	1
Number of terminals	16
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Package body material	CERAMIC
encapsulated code	QCCN
Encapsulate equivalent code	LCC16,.3x.2,40
Package shape	RECTANGULAR
Package form	CHIP CARRIER
Maximum seat height	2.13 mm
Maximum slew rate	40 mA
Nominal supply voltage	3.3 V
surface mount	YES
Telecom integrated circuit types	ATM/SONET/SDH SUPPORT CIRCUIT
Temperature level	INDUSTRIAL
Terminal surface	Gold (Au) - with Nickel (Ni) barrier
Terminal form	NO LEAD
Terminal pitch	1.02 mm
Terminal location	QUAD
width	5.08 mm

Preview

Download Datasheet

View All

FX-700

Low Jitter Frequency Translator

FX-700

Description

The FX-700 is a crystal-based frequency translator used in communications applications where low jitter is paramount.

Performance advantages include superior jitter performance, high output frequencies and small package size. Advanced custom

ASIC technology results in a highly robust, reliable and predictable device. The device is packaged in a 16 pad ceramic package

with a hermetic seam welded lid.

Features

•

5.0 x 7.5 mm, Hermetically sealed SMD package

Frequency Translation to 77.760 MHz

3.3 Volt or 5.0 Volt Supply

Tri-State Output allows board test

Lock Detect

Commercial or Industrial Temp. Range

CMOS Output

Absolute Pull Range Performance to +/-100 ppm

Capable of locking to an 8 kHz pulse/BITS clock

Product is free of lead and compliant to EC RoHS Directive

•

Applications

Frequency Translation, Clock Smoothing

Telecom - SONET/SDH/ATM

Datacom – DSLAM, DSLAR, Access Nodes

Base Station – GSM, CDMA

Cable Modem Head End

Block Diagram

(8)

C1 Charge

Pump Out

(5)

Charge

Pump

OUT

(3)

(16)

VCXO

OUT

(13)

FIN

(6)

(1-64)

Phase

Detector

& LD

(1-16384)

FOUT

(10)

(1)

(11)

(2)

(14)

VCXO

(12)

TRI-STATE

(4)

GND

(7, 9)

Figure 1. Functional block diagram

Page 1 of 7

Tape and Reel

Table 6. Tape and Reel Information

Tape Dimensions (mm)

7.5

1.5

20.2

Reel Dimensions (mm)

16.4

178

#/Reel

500

Figure 4. Tape and Reel

FX-700 Theory of Operation

The FX-700 includes an integrated phase detector, current mode charge pump, programmable frequency dividers and VCXO. The

FX-700 will translate an input frequency such as 8 kHz, 1.544 MHz or 19.440 MHz to a speciﬁc output frequency which is an integer

multiple (1-16384) of the input frequency and less than or equal to 77.760 MHz. For clock smoothing applications, the input

frequency is typically internally divided down by a factor of 64 (2N where N = 6) by the input frequency divider and this frequency

becomes an input to the phase detector. The integrated frequency dividers (factory programmed) and crystal based VCXO allows

for a large range of possible frequency translations and clock smoothing applications.

The FX-700’s PLL is a feedback system which forces the output frequency to lock in both phase and frequency to the input

frequency. While there will be some phase error, theory states there is no frequency error. The loop ﬁlter design will dictate many

key parameters such as jitter reduction, stability, lock range and acquisition time. The external second order passive loop ﬁlter is

a complex impedance in parallel with the input capacitance of the VCXO. The loop ﬁlter converts the charge pump output into

the VCXO’s control voltage. VI’s loop ﬁlter design methodology involves the calculation of the open loop gain bandwidth and

corresponding phase margin to determine the optimal component values that ensure high loop stability and acceptable lock in

time. As a rule of thumb, the VCXO gain is typically 100 ppm/volt and the charge pump current is typically 32 uA.

VI’s Applications Engineering staﬀ can provide the external loop ﬁlter component values required to meet speciﬁc system

requirements and application.

Suggested FX-700 Circuit Conﬁguration Drawing

Page 5 of 7

Recommended Resources

TDA7350 power amplifier circuit diagram

Field output circuit: TA8445K circuit diagram

Universal inverter deceleration braking circuit

simple tv signal generator

Computer motherboard circuit diagram 810 1_05

*T1PER assignment issue: I use 2406 and write programs in C.When the motor is variable frequency speed regulation, it is necessary to change the timer period, that is,the carrier period. But when I assign the calculated perio...; phatato Analogue and Mixed Signal

【TI original】Digital photo frame based on LM3s811: In the form of SD card, the pic file converted by the module software is read from the SD card, and then displayed on the 3.2-inch LCD screen. The SD is behind the LCD screen. The LM3S811 used is the ...; 梦之旅 Microcontroller MCU

Post an egg: ...; jqq850226 Embedded System

Year-end summary: I have been busy for a year. I rushed to finish a project at the beginning of the year, and it came to an end in May. Then I was busy decorating the house. I had to check all kinds of building materia...; yinyue01 Talking

Help: About pin identification: I just applied for an F247. Is the first pin from the left counterclockwise facing the dimple considered as pin 1, or is the first pin from the left counterclockwise facing the letter considered as pi...; sbdhgxm Microcontroller MCU

Learn Hercules Learn the initialization process of Hercules from _c_int00!: In the IAR project configuration, enter [color=red][b]_c_int00[/b][/color] in [b]Linker/Library/Override default program entry [/b]Entery symbolAfter downloading and debugging, jump directly to the [c...; 蓝雨夜 Microcontroller MCU

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

Popular Components