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AT87F52_14

Description
Three-Level Program Memory Lock
File Size170KB,24 Pages
ManufacturerAtmel (Microchip)
Download Datasheet View All

AT87F52_14 Overview

Three-Level Program Memory Lock

Features
Compatible with MCS-51™ Products
8K Bytes of User Programmable QuickFlash™ Memory
Fully Static Operation: 0 Hz to 24 MHz
Three-Level Program Memory Lock
256 x 8-Bit Internal RAM
32 Programmable I/O Lines
Three 16-Bit Timer/Counters
Eight Interrupt Sources
Programmable Serial Channel
Low Power Idle and Power Down Modes
Description
The AT87F52 is a low-power, high-performance CMOS 8-bit microcomputer with 8K
bytes of QuickFlash programmable read only memory. The device is manufactured
using Atmel’s high density nonvolatile memory technology and is compatible with the
industry standard 80C51 and 80C52 instruction set and pinout. The on-chip Quick-
Flash allows the program memory to be user programmed by a conventional nonvola-
tile memory programmer. By combining a versatile 8-bit CPU with QuickFlash on a
monolithic chip, the Atmel AT87F52 is a powerful microcomputer which provides a
highly flexible and cost effective solution to many embedded control applications.
(continued)
8-Bit
Microcontroller
with 8K Bytes
QuickFlash
AT87F52
Not Recommended
for New Designs.
Use AT89S52.
Pin Configurations
(T2) P1.0
(T2 EX) P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
RST
(RXD) P3.0
(TXD) P3.1
(INT0) P3.2
(INT1) P3.3
(T0) P3.4
(T1) P3.5
(WR) P3.6
(RD) P3.7
X TA L 2
X TA L 1
GND
PDIP
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
VCC
P0.0 (AD0)
P0.1 (AD1)
P0.2 (AD2)
P0.3 (AD3)
P0.4 (AD4)
P0.5 (AD5)
P0.6 (AD6)
P0.7 (AD7)
EA/VPP
ALE/PROG
PSEN
P2.7 (A15)
P2.6 (A14)
P2.5 (A13)
P2.4 (A12)
P2.3 (A11)
P2.2 (A10)
P2.1 (A9)
P2.0 (A8)
TQFP
(T2 EX)
(T2)
(AD0)
(AD1)
(AD2)
(AD3)
44 42 40
38
36 34
43 41 39
37
35
P1.5
P1.6
P1.7
RST
P3.0
NC
P3.1
P3.2
P3.3
P3.4
P3.5
P1.4
P1.3
P1.2
P1.1
P1.0
NC
VCC
P0.0
P0.1
P0.2
P0.3
INDEX
CORNER
(RXD)
(TXD)
(INT0)
(INT1)
(T0)
(T1)
1
2
3
4
5
6
7
8
9
10
11
13 15 17 19 21
12 14 16 18 20 22
33
32
31
30
29
28
27
26
25
24
23
P0.4 (AD4)
P0.5 (AD5)
P0.6 (AD6)
P0.7 (AD7)
EA/VPP
NC
ALE/PROG
PSEN
P2.7 (A15)
P2.6 (A14)
P2.5 (A13)
PLCC
(T2 EX)
(T2)
(AD0)
(AD1)
(AD2)
(AD3)
P0.4 (AD4)
P0.5 (AD5)
P0.6 (AD6)
P0.7 (AD7)
EA/VPP
NC
ALE/PROG
PSEN
P2.7 (A15)
P2.6 (A14)
P2.5 (A13)
(WR) P3.6
(RD) P3.7
X TA L 2
X TA L 1
GND
GND
(A8) P2.0
(A9) P2.1
(A10) P2.2
(A11) P2.3
(A12) P2.4
(RXD)
(TXD)
(INT0)
(INT1)
(T0)
(T1)
P1.5
P1.6
P1.7
RST
P3.0
NC
P3.1
P3.2
P3.3
P3.4
P3.5
6
4
2
44 42 40
1
5
3
4 3 4 13 9
7
8
38
9
37
36
10
35
11
34
12
33
13
32
14
31
15
16
30
1 7 1 9 2 1 2 3 2 5 2 72 9
18 20 22 24 26 28
(WR) P3.6
(RD) P3.7
X TA L 2
X TA L 1
GND
NC
(A8) P2.0
(A9) P2.1
(A10) P2.2
(A11) P2.3
(A12) P2.4
P1.4
P1.3
P1.2
P1.1
P1.0
NC
VCC
P0.0
P0.1
P0.2
P0.3
INDEX
CORNER
Rev. 1011A–02/98
1
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