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ZPSD412A2VM-25LI

Description
Parallel I/O Port, 40 I/O, CMOS, CQCC68,
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size2MB,108 Pages
ManufacturerWaferscale Integration Inc.
Download Datasheet Parametric View All

ZPSD412A2VM-25LI Overview

Parallel I/O Port, 40 I/O, CMOS, CQCC68,

ZPSD412A2VM-25LI Parametric

Parameter NameAttribute value
MakerWaferscale Integration Inc.
Reach Compliance Codeunknown
Other featuresGENERAL PURPOSE ZPLD
maximum clock frequency33.33 MHz
External data bus width8
JESD-30 codeS-GQCC-J68
Number of I/O lines40
Number of ports5
Number of terminals68
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Package body materialCERAMIC, GLASS-SEALED
Package shapeSQUARE
Package formCHIP CARRIER
Certification statusNot Qualified
Maximum supply voltage5.5 V
Minimum supply voltage2.7 V
Nominal supply voltage3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal formJ BEND
Terminal locationQUAD
uPs/uCs/peripheral integrated circuit typePARALLEL IO PORT, GENERAL PURPOSE
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Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
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