UPD4482163GF-A44Y-A datasheet, PDF

Datasheet> All Categories > storage> storage> UPD4482163GF-A44Y-A

UPD4482163GF-A44Y-A: DescriptionCache SRAM, 512KX16, 2.8ns, CMOS, PQFP100, 14 X 20 MM, PLASTIC, LQFP-100; Categorystorage storage; File Size301KB，28 Pages; ManufacturerNEC Electronics

Download Datasheet Parametric View All

UPD4482163GF-A44Y-A Overview

Cache SRAM, 512KX16, 2.8ns, CMOS, PQFP100, 14 X 20 MM, PLASTIC, LQFP-100

UPD4482163GF-A44Y-A Parametric

Parameter Name	Attribute value
Maker	NEC Electronics
Parts packaging code	QFP
package instruction	LQFP,
Contacts	100
Reach Compliance Code	unknown
ECCN code	3A991.B.2.A
Maximum access time	2.8 ns
Other features	PIPELINED ARCHITECTURE
JESD-30 code	R-PQFP-G100
JESD-609 code	e6
length	20 mm
memory density	8388608 bit
Memory IC Type	CACHE SRAM
memory width	16
Number of functions	1
Number of terminals	100
word count	524288 words
character code	512000
Operating mode	SYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
organize	512KX16
Package body material	PLASTIC/EPOXY
encapsulated code	LQFP
Package shape	RECTANGULAR
Package form	FLATPACK, LOW PROFILE
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
Certification status	Not Qualified
Maximum seat height	1.7 mm
Maximum supply voltage (Vsup)	3.465 V
Minimum supply voltage (Vsup)	3.135 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	TIN BISMUTH
Terminal form	GULL WING
Terminal pitch	0.65 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED
width	14 mm

Preview

Download Datasheet

View All

DATA SHEET

MOS INTEGRATED CIRCUIT

PD4482163, 4482183, 4482323, 4482363

8M-BIT CMOS SYNCHRONOUS FAST SRAM

PIPELINED OPERATION

DOUBLE CYCLE DESELECT

Description

The

PD4482163 is a 524,288-word by 16-bit, the

PD4482183 is a 524,288-word by 18-bit,

PD4482323 is a 262,144-

word by 32-bit and the

PD4482363 is a 262,144-word by 36-bit synchronous static RAM fabricated with advanced CMOS

technology using Full-CMOS six-transistor memory cell.

The

PD4482163,

PD4482183,

PD4482323 and

PD4482363 integrates unique synchronous peripheral circuitry, 2-

bit burst counter and output buffer as well as SRAM core. All input registers are controlled by a positive edge of the single

clock input (CLK).

The

PD4482163,

PD4482183,

PD4482323 and

PD4482363 are suitable for applications which require synchronous

operation, high speed, low voltage, high density and wide bit configuration, such as cache and buffer memory.

ZZ has to be set LOW at the normal operation. When ZZ is set HIGH, the SRAM enters Power Down State (“Sleep”). In

the “Sleep” state, the SRAM internal state is preserved. When ZZ is set LOW again, the SRAM resumes normal operation.

The

PD4482163,

PD4482183,

PD4482323 and

PD4482363 are packaged in 100-pin PLASTIC LQFP with a 1.4

mm package thickness for high density and low capacitive loading.

Features

•

Single 3.3 V power supply

•

Synchronous operation

•

Operating temperature : T

= 0 to 70

°C

(-A44, -A50, -A60)

−40

+85 °C

(-A44Y, -A50Y, -A60Y)

•

Internally self-timed write control

•

Burst read / write : Interleaved burst and linear burst sequence

•

Fully registered inputs and outputs for pipelined operation

•

Double-Cycle deselect timing

•

All registers triggered off positive clock edge

•

3.3 V LVTTL Compatible : All inputs and outputs

•

Fast clock access time : 2.8 ns (225 MHz), 3.1 ns (200 MHz), 3.5 ns (167 MHz)

•

Asynchronous output enable : /G

•

Burst sequence selectable : MODE

•

Sleep mode : ZZ (ZZ = Open or Low : Normal operation)

•

Separate byte write enable : /BW1 to /BW4, /BWE (

PD4482323,

PD4482363)

/BW1, /BW2, /BWE (

PD4482163,

PD4482183)

Global write enable : /GW

•

Three chip enables for easy depth expansion

•

Common I/O using three state outputs

The information in this document is subject to change without notice. Before using this document, please

confirm that this is the latest version.

Not all products and/or types are available in every country. Please check with an NEC Electronics

sales representative for availability and additional information.

Document No. M14904EJ3V0DS00 (3rd edition)

Date Published December 2002 NS CP(K)

Printed in Japan

The mark shows major revised points.

The mark

shows major revised points.

2000

Recommended Resources

Remote control detector circuit diagram

Ultra-low drift peak detector circuit diagram

Rice cooker cooked music circuit

Long timer circuit

Programmable voltage amplifier

Dual color light circuit

TI China Embedded Educator Conference: The annual Texas Instruments China Educators Conference was held in Jinan, the city of springs, from November 7 to 11, 2012. This educators conference was hosted by Texas Instruments and organized by ...; qwqwqw2088 Analogue and Mixed Signal

Let the struct fly for a while: Let the struct fly for a while When developing embedded systems, C language is mostly used. C language is not just about a few functions, nor can it be solved with a few variables. When it comes to ne...; paulhyde Microcontroller MCU

Weird invention: aerial floating device comes out: SSBOT coffee water bottle deviceFrancisco Speich of Switzerland designed SSBOT, a water bottle device for coffee machines. Sandwich hollow breadSandwich hollow bread Jean-Paul Magro from France invent...; xyh_521 Creative Market

Ningbo Zhongwei Live: Huge losses drag down the true situation of BYD's chip project: Zhongwei's equipment has been in use for more than 15 years and has basically reached the end of its life. "Everything is subject to the announcement." Recently, the reporter contacted Wang Jianjun, d...; 小丸子 Automotive Electronics

What to do if TI M3 is discontinued? !: Some of our products are still using LM3S6911, LM3S811, LM3S9B92, LM3S9B96 (for PTP). How long can the supply last after the discontinuation of production? ? M4 does not support Ethernet, what should ...; yanhy Microcontroller MCU

The circuit of 232 to 485 keeps receiving 00 as soon as the circuit is powered on. What's going on?: The 232 to 485 circuit keeps receiving 00 as soon as the circuit is powered on. What's going on? My connection method is as shown in the figure. The A and B of the 485 chip are connected to the bus. T...; mayingchen Embedded System

Shortcut: E0 E1 E2 E3 E4 E5 E6 E7 E8 E9 EA EB EC ED EE EF EG EH EI EJ EK EL EM EN EO EP EQ ER ES ET EU EV EW EX EY EZ F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 FA FB FC FD FE FF FG FH FI FJ FK FL FM FN FO FP FQ FR FS FT FU FV FW FX FY FZ G0 G1 G2 G3 G4 G5 G6 G7 G8 G9 GA GB GC GD GE GF GG GH GI GJ GK GL GM GN GO GP GQ GR GS GT GU GV GW GX GZ H0 H1 H2 H3 H4 H5 H6 H7 H8 HA HB HC HD HE HF HG HH HI HJ HK HL HM HN HO HP HQ HR HS HT HU HV HW HX HY HZ I1 I2 I3 I4 I5 I6 I7 IA IB IC ID IE IF IG IH II IK IL IM IN IO IP IQ IR IS IT IU IV IW IX J0 J1 J2 J6 J7 JA JB JC JD JE JF JG JH JJ JK JL JM JN JP JQ JR JS JT JV JW JX JZ K0 K1 K2 K3 K4 K5 K6 K7 K8 K9 KA KB KC KD KE KF KG KH KI KJ KK KL KM KN KO KP KQ KR KS KT KU KV KW KX KY KZ

Popular Components