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SN54S113J

Description
S SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP14
Categorylogic    logic   
File Size260KB,6 Pages
ManufacturerTexas Instruments
Websitehttp://www.ti.com.cn/
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SN54S113J Overview

S SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP14

SN54S113J Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerTexas Instruments
package instructionDIP, DIP14,.3
Reach Compliance Codenot_compliant
seriesS
JESD-30 codeR-CDIP-T14
length19.56 mm
Load capacitance (CL)15 pF
Logic integrated circuit typeJ-K FLIP-FLOP
Number of digits2
Number of functions2
Number of terminals14
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
Output polarityCOMPLEMENTARY
Package body materialCERAMIC, METAL-SEALED COFIRED
encapsulated codeDIP
Encapsulate equivalent codeDIP14,.3
Package shapeRECTANGULAR
Package formIN-LINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply5 V
Maximum supply current (ICC)25 mA
propagation delay (tpd)7 ns
Certification statusNot Qualified
Maximum seat height5.08 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountNO
technologyTTL
Temperature levelMILITARY
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
Trigger typeNEGATIVE EDGE
width7.62 mm
minfmax125 MHz

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SN54S113J SN54LS113AW SN74S113AN SN74S113AD
Description S SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP14 LS SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, CDFP14 Dual J-K Negative-Edge-Triggered Flip-Flops With Preset 14-PDIP 0 to 70 Dual J-K Negative-Edge-Triggered Flip-Flops With Preset 14-SOIC 0 to 70
Is it Rohs certified? incompatible incompatible incompatible incompatible
Maker Texas Instruments Texas Instruments Texas Instruments Texas Instruments
Reach Compliance Code not_compliant not_compliant not_compliant _compli
series S LS S S
JESD-30 code R-CDIP-T14 R-CDFP-F14 R-PDIP-T14 R-PDSO-G14
length 19.56 mm 9.21 mm 19.305 mm 8.65 mm
Logic integrated circuit type J-K FLIP-FLOP J-K FLIP-FLOP J-K FLIP-FLOP J-K FLIP-FLOP
Number of digits 2 2 2 2
Number of functions 2 2 2 2
Number of terminals 14 14 14 14
Maximum operating temperature 125 °C 125 °C 70 °C 70 °C
Output polarity COMPLEMENTARY COMPLEMENTARY COMPLEMENTARY COMPLEMENTARY
Package body material CERAMIC, METAL-SEALED COFIRED CERAMIC, METAL-SEALED COFIRED PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code DIP DFP DIP SOP
Encapsulate equivalent code DIP14,.3 FL14,.3 DIP14,.3 SOP14,.25
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form IN-LINE FLATPACK IN-LINE SMALL OUTLINE
Peak Reflow Temperature (Celsius) NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
power supply 5 V 5 V 5 V 5 V
propagation delay (tpd) 7 ns 20 ns 7 ns 7 ns
Certification status Not Qualified Not Qualified Not Qualified Not Qualified
Maximum seat height 5.08 mm 2.03 mm 5.08 mm 1.75 mm
Maximum supply voltage (Vsup) 5.5 V 5.5 V 5.25 V 5.25 V
Minimum supply voltage (Vsup) 4.5 V 4.5 V 4.75 V 4.75 V
Nominal supply voltage (Vsup) 5 V 5 V 5 V 5 V
surface mount NO YES NO YES
technology TTL TTL TTL TTL
Temperature level MILITARY MILITARY COMMERCIAL COMMERCIAL
Terminal form THROUGH-HOLE FLAT THROUGH-HOLE GULL WING
Terminal pitch 2.54 mm 1.27 mm 2.54 mm 1.27 mm
Terminal location DUAL DUAL DUAL DUAL
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
Trigger type NEGATIVE EDGE NEGATIVE EDGE NEGATIVE EDGE NEGATIVE EDGE
width 7.62 mm 6.29 mm 7.62 mm 3.9 mm
minfmax 125 MHz 45 MHz 125 MHz 125 MHz
package instruction DIP, DIP14,.3 - DIP, DIP14,.3 SOP, SOP14,.25
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