M
Author:
AN820
CIRCUITRY BACKGROUND
MCP120 Output Stage
A simplified schematic for the MCP120 output stage is
shown in Figure 1. Nominally, the output stage of the
MCP120 can handle sinking less than 1 mA of current
in a high impedance state. That is, when the output is
not driving low and when a voltage is applied to the out-
put that is higher than the power supply level, the out-
put can handle sinking less than 1 mA. Other pertinent
electrical specifications for the device are shown in the
data sheet, which includes test conditions for the chip.
The MCP120 has an open drain output, though it is not
a true open drain. Specifically, the PMOS transistor on
the high side of the output stage is diode-connected, as
shown in Figure 1. When the voltage applied to the out-
put of the supervisor exceeds the power supply for the
chip, the PMOS transistor acts like a forward biased
diode. Lastly, since the output stage is open drain, a
pull-up resistor is required between the supervisor out-
put and V
DD
.
System Supervisors in ICSP
TM
Architectures
Ken Dietz
Microchip Technology Inc.
INTRODUCTION
Semiconductor manufacturers have designed several
types of circuit supervisors with varying types of func-
tionality over the past few years. Some supervisors
incorporate watchdog features as well as complex func-
tions, such as programmable threshold levels. As it
turns out, most system supervisor data sheets address
typical supervisor functions related to Power-on Reset,
power-down, and brown-out conditions. In order to
serve a wide customer base, semiconductor manufac-
turers should also address system supervisors
designed into systems where microcontrollers (MCUs)
and programmable logic devices (PLDs) are pro-
grammed in-circuit. Programming PICmicro
®
micro-
controllers in this fashion is known as In-Circuit Serial
Programming
TM
(ICSP
TM
), which can be implemented
for a variety of reasons, including field upgrades.
System supervisors are available with several types of
output stages. Some have active low output stages,
some active high, and there are others similar to the
MCP100, with output stages that drive RESET lines
both high and low. Supervisor output stages are
extremely important to understand for ICSP circuitry,
since programming equipment actually drives the out-
put stages when the MCU or PLD is being pro-
grammed. While there is a wide variety of supervisor
types available on the market, this Application Note pri-
marily focuses on the MCP120, which has an open
drain, active low, output stage. Even though the
MCP120 was chosen for this ICSP example, the design
techniques included below are intended to guide
designers with supervisors of all kinds for ICSP
circuitry.
V
DD
In
Out
GND
FIGURE 1:
MCP120 output stage simplified.
2002 Microchip Technology Inc.
DS00820A-page 1
AN820
ICSP Circuit Configuration
A schematic showing ICSP circuitry with the MCP120 is
shown in Figure 2. A current limiting resistor, R
CL
, limits
the current driven into the output stage of the supervisor
when the programming voltage is applied to the MCU.
A pull-up resistor, R
PU
, is placed between the supervi-
sor output and V
DD
, since the MCP120 output is open
drain and active low. Calculations for the resistors are
explained in the Design Methodology section.
The pull-down resistor, R
PD
, shown in Figure 2 is useful
during power-up and power-down sequences. Supervi-
sor functionality is not specified at power supply volt-
ages typically lower than 1 Volt, so the output stage of
the supervisor could be in a high impedance state. If
the supervisor output is high impedance and voltage is
applied to the MCU from an external source, the pro-
cessor could potentially run its program until the super-
visor takes over and resets the MCU again. This is
especially important in systems where multiple printed
circuit boards are interfaced together and a secondary
board might end up driving the MCU I/O pins before
power is applied to the primary board.
Since the voltage on the MCLR pin on a PICmicro
®
MCU is very close to the power supply level, R
PD
can
be fairly large to minimize current consumption when
the circuit is normally operating. Furthermore, during
program and verify sequences, up to 13.25 Volts are
applied to the pull-down resistor. Because of this, R
PD
should also be large enough to minimize current con-
sumption for the programming voltage supply. A value
of 100 kΩ (+/-5%) results in a maximum of 140
µA
when V
PP
is applied to the microcontroller, or 134
µA
if
1% resistors are used, which is a small load for most
programmers. For battery powered applications, sub-
stantially larger valued resistors may be desirable for
this purpose.
V
DD
(Programmer Supplied)
3.3 Volts
Isolation
Microcontroller
V
DD
Bypass
Capacitor
MCP120
V
DD
V
SS
RST
R
PU
R
CL
MCLR
R
PD
V
PP
V
SS
FIGURE 2:
Active low open drain ICSP circuit.
Another important aspect to consider for In-Circuit
Serial Programming includes the cable length for the
interface. Not only are sufficient current drive capabili-
ties required, but if a lengthy cable is used, reflections
and oscillations may cause programming errors.
Because of this phenomenon, manufacturers imple-
menting ICSP architectures should keep their cables
as short as possible. The circuits tested for the purpose
of this article implemented the ICSP cable that is nor-
mally shipped with the ICSP module, which is about 6
feet long. Lastly, the end of the cable connected to the
printed circuit board was modified to interface to a
modular connector.
Key Programmer Specifications
The PRO MATE
®
II and the ICSP Socket Module, part
number AC004004, were used to test the circuit shown
in Figure 2. Current drive for the programming voltage
signal and current drive for the power supply signals are
critical specifications for the ICSP socket module. For
the V
PP
signal, the output of the ICSP module can pro-
vide as much as 100 mA, and for the power supply sig-
nal, the ICSP socket module can drive as much as
400 mA. Furthermore, the PRO MATE II programs
MCUs only at 5 Volts. However, it does have the capa-
bility to verify the memory contents of microcontrollers
at power supply levels ranging from 2.5 Volts to
5.5 Volts.
DS00820A-page 2
2002 Microchip Technology Inc.
AN820
DESIGN METHODOLOGY
Absolute Maximum Clarifications
A critical question about designing this type of circuit
revolves around the worst case voltages and currents
applied to the circuit. Additionally, a circuit designer
needs to determine whether or not the absolute maxi-
mum ratings for any of the components on the board
are being exceeded. Knowing the largest voltage drops
across the circuit enables a designer to calculate the
resistor sizes so that absolute maximum ratings for all
components are not exceeded. From the PIC16LF872
data sheet (DS30221), the maximum voltage that can
be applied to the MCLR pin of the microcontroller can-
not exceed 13.25 Volts. Additionally, the maximum volt-
age that can be applied to any pin on the MCP120, with
respect to V
SS
, is from -0.6 Volts to (V
DD
+ 1.0) Volts.
and R
CL
, respectively. If standard 5% resistors are
being used in the circuit, then 750Ω and 13 kΩ are the
correct solutions.
In order to determine if this combination of resistors will
work in the design, all of the permutations for power
supply levels and output drive levels for the supervisor
must include calculations for minimum and maximum
currents and voltages in the circuit. While the microcon-
troller is being programmed, power supply levels can
be as high as 5.5 Volts for the PIC16LF872 during ver-
ify operations. This can be further clarified by reviewing
Figure 3. With this in mind, minimum and maximum cir-
cuit calculations show that this selection of resistors will
work within tolerance.
Results
Figure 3 shows a successful programming waveform
for two key nodes in an ICSP circuit. Channel 1 mea-
sured the voltage levels on the supervisor output pin,
RST, and Channel 2 measured the voltage applied to
the node between the power supply pins of the micro-
controller and the supervisor. The circuit schematic for
this system was shown in Figure 2. Notice that
Channel 2 in Figure 3 shows the verification voltage
levels at 5.5 Volts and 2.5 Volts. Notice also that Chan-
nel 1 shows the voltage on the RST pin at about
700 mV when the supervisor output is driving low.
Lastly, when the supervisor output is high impedance,
Channel 1 shows a voltage level of 5.7 Volts applied to
RST, which is about 700 mV above the power supply.
Calculations
Since the lowest voltage applied to V
DD
is 0 Volts dur-
ing programming, the voltage applied to the RST pin
should not exceed 1.0 Volt. Knowing this, the circuit
can be designed to limit the voltage applied to RST to
a nominal 700 mV. This means that R
CL
has to drop at
most 12.55 Volts. If the assumption is made that all of
the current flowing through R
CL
is also flowing through
R
PU
when the supervisor output is high impedance,
then R
PU
needs to be 700Ω and R
CL
should be at least
12.55kΩ. For standard 1% tolerance resistors, 715Ω
and 12.7kΩ would be the correct selections for R
PU
RST Node
V
DD
Node
FIGURE 3:
Successful programming waveform.
2002 Microchip Technology Inc.
DS00820A-page 3
AN820
SUPERVISORS WITH PUSH-PULL
OUTPUT STAGES
Typical N-Well CMOS Process
Figure 4 shows a cutaway view of a typical N-Well
CMOS process, including connections for the MCP100
output stage. This type of process is currently used by
Microchip Technology. When the node between the two
transistors is raised above V
DD
, the PMOS transistor
allows current to flow from V
PP
to the power supply.
Because of this, ICSP circuits are difficult to implement
with supervisors containing push-pull output stages.
Driving too much current into the supervisor output
results in unstable operation, like the waveforms shown
in Figure 5. This waveform was measured on a circuit
using the MCP100 and the PIC16LF872. The circuit
architecture was similar to the one shown in Figure 2,
with the exception that the pull-up resistor was
removed, since the MCP100 has the capability to drive
the RESET pin both high and low. Also, the current lim-
iting resistor was reduced to about 1 kΩ for this
demonstration.
FIGURE 4:
Push-Pull output in N-Well CMOS process.
ming operations periodically. Because of the results of
these tests, Microchip Technology recommends
designing open drain supervisors into ICSP circuitry,
rather than push-pull supervisors.
Results
As shown in Figure 5, an excessive amount of current
driven into the supervisor results in failed program-
ming. In this case, the chip failed during the verification
tests. It should be further noted that increasing the
current limiting resistor yielded successful program-
RST Node
V
DD
Node
FIGURE 5:
Failed verify programming waveform.
DS00820A-page 4
2002 Microchip Technology Inc.
AN820
CONCLUSION
In summary, throughout this Application Note, output
stages for system supervisors in ICSP circuits were dis-
cussed. The importance of understanding output stage
architectures and how they interact with programming
hardware was emphasized. Lastly, two ICSP circuits
were included as examples. One circuit illustrated how
to implement an ICSP interface between a micro-
controller and a system supervisor, and the other dem-
onstrated some of the pitfalls designers encounter with
this circuit architecture.
REFERENCES
AN686, (1998),
Understanding and Using Supervisory
Circuits,
available on the Microchip Technology, Inc.,
web site:
http://www.microchip.com/download/appnote/super/
about/00686a.pdf
MCP100 Data Sheet
(DS11187), available on the
Microchip Technology, Inc., web site:
http://www.microchip.com/download/lit/pline/analog/
power/pwrmang/super/11187f.pdf
MCP120/130 Data Sheet
(DS11184), available on the
Microchip Technology, Inc., web site:
http://www.microchip.com/download/lit/pline/analog/
power/pwrmang/super/11184d.pdf
Sedra and Smith, (1998, 4
th
edition),
Microelectronic
Circuits,
Oxford University Press, Oxford.
2002 Microchip Technology Inc.
DS00820A-page 5
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