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UT54ACS4002-UQCH

Description
NOR Gate, AC Series, 2-Func, 4-Input, CMOS, CDFP14, FP-14
Categorylogic    logic   
File Size35KB,4 Pages
ManufacturerCobham Semiconductor Solutions
Download Datasheet Parametric View All

UT54ACS4002-UQCH Overview

NOR Gate, AC Series, 2-Func, 4-Input, CMOS, CDFP14, FP-14

UT54ACS4002-UQCH Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerCobham Semiconductor Solutions
Parts packaging codeDFP
package instructionDFP,
Contacts14
Reach Compliance Codeunknown
seriesAC
JESD-30 codeR-CDFP-F14
JESD-609 codee0
length9.525 mm
Logic integrated circuit typeNOR GATE
Number of functions2
Number of entries4
Number of terminals14
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
Package body materialCERAMIC, METAL-SEALED COFIRED
encapsulated codeDFP
Package shapeRECTANGULAR
Package formFLATPACK
Peak Reflow Temperature (Celsius)NOT SPECIFIED
propagation delay (tpd)14 ns
Certification statusNot Qualified
Filter levelMIL-PRF-38535 Class Q
Maximum seat height2.921 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelMILITARY
Terminal surfaceTIN LEAD
Terminal formFLAT
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
total dose1M Rad(Si) V
width6.2865 mm
UT54ACS4002/UT54ACTS4002
Radiation-Hardened
Dual 4-Input NOR Gates
FEATURES
radiation-hardened CMOS
- Latchup immune
High speed
Low power consumption
Single 5 volt supply
Available QML Q or V processes
Flexible package
- 14-pin DIP
- 14-lead flatpack
DESCRIPTION
The UT54ACS4002 and the UT54ACTS4002 are dual 4-input
NOR gates. A high on any input forces the output to a low state.
The circuits perform the Boolean functions:
Y = A + B + C + D = A B C D.
The devices are characterized over full military temperature
range of -55 C to +125 C.
FUNCTION TABLE
INPUTS
An
L
H
X
X
X
Bn
L
X
H
X
X
Cn
L
X
X
H
X
Dn
L
X
X
X
H
OUTPUT
Yn
H
L
L
L
L
PINOUTS
14-Pin DIP
Top View
Y1
A1
B1
C1
D1
NC
V
SS
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V
DD
Y2
D2
C2
B2
A2
NC
14-Lead Flatpack
Top View
Y1
A1
B1
C1
D1
NC
V
SS
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V
DD
Y2
D2
C2
B2
A2
NC
LOGIC DIAGRAM
LOGIC SYMBOL
A1
B1
C1
D1
A2
B2
C2
D2
(1)
Y1
Y1
A1
B1
C1
D1
A2
B2
C2
D2
(2)
(3)
(4)
(5)
(9)
(10)
(11)
(12)
1
Y2
(13)
Y2
Note:
1. Logic symbol in accordance with ANSI/IEEE standard 91-1984 and IEC
Publication 617-12.
241
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