AM29F040-120FI datasheet, PDF - EEWORLD Datasheet

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AM29F040-120FI: Description512K X 8 FLASH 5V PROM, 90 ns, PQCC32; Categorystorage storage; File Size145KB，33 Pages; ManufacturerAMD; Websitehttp://www.amd.com

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AM29F040-120FI Overview

512K X 8 FLASH 5V PROM, 90 ns, PQCC32

AM29F040-120FI Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	AMD
Parts packaging code	TSOP
package instruction	TSOP1-R, TSSOP32,.8,20
Contacts	32
Reach Compliance Code	unknown
ECCN code	EAR99
Maximum access time	120 ns
Other features	100K WRITE/ERASE CYCLES MIN
command user interface	YES
Data polling	YES
Durability	100000 Write/Erase Cycles
JESD-30 code	R-PDSO-G32
JESD-609 code	e0
length	18.4 mm
memory density	4194304 bit
Memory IC Type	FLASH
memory width	8
Number of functions	1
Number of departments/size	8
Number of terminals	32
word count	524288 words
character code	512000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
organize	512KX8
Output characteristics	3-STATE
Package body material	PLASTIC/EPOXY
encapsulated code	TSOP1-R
Encapsulate equivalent code	TSSOP32,.8,20
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE
Parallel/Serial	PARALLEL
power supply	5 V
Programming voltage	5 V
Certification status	Not Qualified
reverse pinout	YES
Maximum seat height	1.2 mm
Department size	64K
Maximum standby current	0.000005 A
Maximum slew rate	0.04 mA
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	GULL WING
Terminal pitch	0.5 mm
Terminal location	DUAL
switch bit	YES
type	NOR TYPE
width	8 mm
Base Number Matches	1

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FINAL

Am29F040

4 Megabit (524,288 x 8-Bit) CMOS 5.0 Volt-only,

Sector Erase Flash Memory

DISTINCTIVE CHARACTERISTICS

5.0 V

10% for read and write operations

— Minimizes system level power requirements

Compatible with JEDEC-standards

— Pinout and software compatible with single-

power-supply Flash

— Superior inadvertent write protection

Package options

— 32-pin PLCC

— 32-pin TSOP

— 32-pin PDIP

Minimum 100,000 write/erase cycles guaranteed

High performance

— 55 ns maximum access time

Sector erase architecture

— Uniform sectors of 64 Kbytes each

— Any combination of sectors can be erased.

Also supports full chip erase.

Sector protection

— Hardware method that disables any combination

of sectors from write or erase operations

Embedded Erase Algorithms

— Automatically preprograms and erases the chip

or any combination of sectors

Embedded Program Algorithms

— Automatically programs and veriﬁes data at

speciﬁed address

Data Polling and Toggle Bit feature for detection

of program or erase cycle completion

Erase suspend/resume

— Supports reading data from a sector not being

erased

Low power consumption

— 20 mA typical active read current

— 30 mA typical program/erase current

Enhanced power management for standby

mode

— <1

A typical standby current

— Standard access time from standby mode

GENERAL DESCRIPTION

The Am29F040 is a 4 Mbit, 5.0 Volt-only Flash memory

organized as 512 Kbytes of 8 bits each. The Am29F040

is offered in a 32-pin package. This device is designed

to be programmed in-system with the standard system

5.0 V V

supply. A 12.0 V V

is not required for

write or erase operations. The device can also be

reprogrammed in standard EPROM programmers.

The standard Am29F040 offers access times between

55 ns and 150 ns, allowing operation of high-speed

microprocessors without wait states. To eliminate bus

contention the device has separate chip enable (CE),

write enable (WE) and output enable (OE) controls.

The Am29F040 is entirely command set compatible

with the JEDEC single-power-supply Flash standard.

Commands are written to the command register using

standard microprocessor write timings. Register con-

tents serve as input to an internal state machine

which controls the erase and programming circuitry.

Write cycles also internally latch addresses and data

needed for the programming and erase operations.

Reading data out of the device is similar to reading

from 12.0 Volt Flash or EPROM devices.

The Am29F040 is programmed by executing the pro-

gram command sequence. This will invoke the Embed-

ded Program Algorithm which is an internal algorithm

that automatically times the program pulse widths and

veriﬁes proper cell margin. Typically, each sector can

be programmed and veriﬁed in less than one second.

Erase is accomplished by executing the erase com-

mand sequence. This will invoke the Embedded Erase

Algorithm which is an internal algorithm that automati-

cally preprograms the array if it is not already pro-

grammed before executing the erase operation. During

erase, the device automatically times the erase pulse

widths and veriﬁes proper cell margin.

Publication#

17113

Rev:

Amendment/0

Issue Date:

November 1996

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