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74LVC1G32GV

Description
OR Gate, LVC/LCX/Z Series, 1-Func, 2-Input, CMOS, PDSO5
Categorylogic    logic   
File Size350KB,19 Pages
ManufacturerNexperia
Websitehttps://www.nexperia.com
Environmental Compliance
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74LVC1G32GV Overview

OR Gate, LVC/LCX/Z Series, 1-Func, 2-Input, CMOS, PDSO5

74LVC1G32GV Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerNexperia
package instructionSC-74A, 5 PIN
Reach Compliance Codecompliant
ECCN codeEAR99
seriesLVC/LCX/Z
JESD-30 codeR-PDSO-G5
JESD-609 codee3
length2.9 mm
Logic integrated circuit typeOR GATE
Humidity sensitivity level1
Number of functions1
Number of entries2
Number of terminals5
Maximum operating temperature125 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)260
propagation delay (tpd)10.5 ns
Certification statusNot Qualified
Maximum seat height1.1 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)1.65 V
Nominal supply voltage (Vsup)1.8 V
surface mountYES
technologyCMOS
Temperature levelAUTOMOTIVE
Terminal surfaceTin (Sn)
Terminal formGULL WING
Terminal pitch0.95 mm
Terminal locationDUAL
Maximum time at peak reflow temperature30
width1.5 mm
74LVC1G32
Single 2-input OR gate
Rev. 10 — 4 September 2012
Product data sheet
1. General description
The 74LVC1G32 provides one 2-input OR function.
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these
devices as translators in mixed 3.3 V and 5 V applications.
Schmitt trigger action at all inputs makes the circuit tolerant of slower input rise and fall
time.
This device is fully specified for partial power-down applications using I
OFF
.
The I
OFF
circuitry disables the output, preventing the damaging backflow current through
the device when it is powered down.
2. Features and benefits
Wide supply voltage range from 1.65 V to 5.5 V
High noise immunity
Complies with JEDEC standard:
JESD8-7 (1.65 V to 1.95 V)
JESD8-5 (2.3 V to 2.7 V)
JESD8-B/JESD36 (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
24
mA output drive (V
CC
= 3.0 V)
CMOS low power consumption
Latch-up performance exceeds 250 mA
Direct interface with TTL levels
Inputs accept voltages up to 5 V
Multiple package options
Specified from
40 C
to +85
C
and
40 C
to +125
C

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