PCA9674; PCA9674A
Remote 8-bit I/O expander for Fm+ I
2
C-bus with interrupt
Rev. 6 — 29 September 2011
Product data sheet
1. General description
The PCA9674 and PCA9674A provide general purpose remote I/O expansion for most
microcontroller families via the two-line bidirectional bus (I
2
C-bus) and are parts of the
Fast-mode Plus (Fm+) family.
The PCA9674/74A is a drop-in upgrade for the PCF8574/74A providing higher Fast-mode
Plus I
2
C-bus speeds (1 MHz versus 400 kHz) so that the output can support PWM
dimming of LEDs, higher I
2
C-bus drive (30 mA versus 3 mA) so that many more devices
can be on the bus without the need for bus buffers, higher total package sink capacity
(200 mA versus 100 mA) that supports having all LEDs on at the same time and more
device addresses (64 versus 8) are available to allow many more devices on the bus
without address conflicts.
The devices consist of an 8-bit quasi-bidirectional port and an I
2
C-bus interface. The
PCA9674/74A have low current consumption and include latched outputs with 25 mA
high current drive capability for directly driving LEDs.
They also possess an interrupt line (INT) that can be connected to the interrupt logic of the
microcontroller. By sending an interrupt signal on this line, the remote I/O can inform the
microcontroller if there is incoming data on its ports without having to communicate via the
I
2
C-bus.
The internal Power-On Reset (POR) or Software Reset sequence initializes the I/Os as
inputs.
2. Features and benefits
1 MHz I
2
C-bus interface
Compliant with the I
2
C-bus Fast and Standard modes
SDA with 30 mA sink capability for 4000 pF buses
2.3 V to 5.5 V operation with 5.5 V tolerant I/Os
8-bit remote I/O pins that default to inputs at power-up
Latched outputs with 25 mA sink capability for directly driving LEDs
Total package sink capability of 200 mA
Active LOW open-drain interrupt output
64 programmable slave addresses using 3 address pins
Readable device ID (manufacturer, device type, and revision)
Low standby current
40 C
to +85
C
operation
ESD protection exceeds 2000 V HBM per JESD22-A114 and 1000 V CDM per
JESD22-C101
NXP Semiconductors
PCA9674; PCA9674A
Remote 8-bit I/O expander for Fm+ I
2
C-bus with interrupt
Latch-up testing is done to JEDEC standard JESD78 which exceeds 100 mA
Packages offered: SO16, TSSOP16, HVQFN16
3. Applications
LED signs and displays
Servers
Industrial control
Medical equipment
PLCs
Cellular telephones
Gaming machines
Instrumentation and test measurement
4. Ordering information
Table 1.
Ordering information
Topside
mark
674
74A
PCA9674D
PCA9674AD
PCA9674
PA9674A
TSSOP16
plastic thin shrink small outline package; 16 leads;
body width 4.4 mm
SOT403-1
SO16
Package
Name
HVQFN16
Description
Version
plastic thermal enhanced very thin quad flat package; no leads; SOT758-1
16 terminals; body 3
3
0.85 mm
plastic small outline package; 16 leads; body width 7.5 mm
SOT162-1
Type number
PCA9674BS
PCA9674ABS
PCA9674D
PCA9674AD
PCA9674PW
PCA9674APW
PCA9674_PCA9674A
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 6 — 29 September 2011
2 of 32
NXP Semiconductors
PCA9674; PCA9674A
Remote 8-bit I/O expander for Fm+ I
2
C-bus with interrupt
5. Block diagram
PCA9674
PCA9674A
INT
AD0
AD1
AD2
SCL
SDA
INPUT
FILTER
INTERRUPT
LOGIC
LP FILTER
I
2
C-BUS
CONTROL
SHIFT
REGISTER
8 BITS
I/O
PORT
P0 to P7
write pulse
read pulse
V
DD
V
SS
POWER-ON
RESET
002aac108
Fig 1.
Block diagram of PCA9674; PCA9674A
write pulse
I
trt(pu)
data from Shift Register
D
FF
CI
S
power-on reset
D
FF
read pulse
CI
S
Q
Q
100
μA
I
OH
V
DD
I
OL
P0 to P7
V
SS
data to Shift Register
002aac109
to interrupt logic
Fig 2.
Simplified schematic diagram of P0 to P7
PCA9674_PCA9674A
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 6 — 29 September 2011
3 of 32
NXP Semiconductors
PCA9674; PCA9674A
Remote 8-bit I/O expander for Fm+ I
2
C-bus with interrupt
6. Pinning information
6.1 Pinning
AD0
AD1
AD2
P0
P1
P2
P3
V
SS
1
2
3
4
5
6
7
8
002aac111
16 V
DD
15 SDA
14 SCL
13 INT
12 P7
11 P6
10 P5
9
P4
AD0
AD1
AD2
P0
P1
P2
P3
V
SS
1
2
3
4
5
6
7
8
002aac113
16 V
DD
15 SDA
14 SCL
13 INT
12 P7
11 P6
10 P5
9
P4
PCA9674D
PCA9674AD
PCA9674PW
PCA9674APW
Fig 3.
Pin configuration for SO16
Fig 4.
PCA9674BS
PCA9674ABS
Pin configuration for TSSOP16
terminal 1
index area
AD2
P0
P1
P2
1
2
3
4
5
6
7
8
13 SDA
12 SCL
11 INT
10 P7
9
P6
P5
16 AD1
15 AD0
V
SS
P3
P4
14 V
DD
002aac114
Transparent top view
Fig 5.
Pin configuration for HVQFN16
PCA9674_PCA9674A
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 6 — 29 September 2011
4 of 32
NXP Semiconductors
PCA9674; PCA9674A
Remote 8-bit I/O expander for Fm+ I
2
C-bus with interrupt
6.2 Pin description
Table 2.
Symbol
AD0
AD1
AD2
P0
P1
P2
P3
V
SS
P4
P5
P6
P7
INT
SCL
SDA
V
DD
Table 3.
Symbol
AD2
P0
P1
P2
P3
V
SS[1]
P4
P5
P6
P7
INT
SCL
SDA
V
DD
AD0
AD1
[1]
Pin description for SO16, TSSOP16
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Description
address input 0
address input 1
address input 2
quasi-bidirectional I/O 0
quasi-bidirectional I/O 1
quasi-bidirectional I/O 2
quasi-bidirectional I/O 3
supply ground
quasi-bidirectional I/O 4
quasi-bidirectional I/O 5
quasi-bidirectional I/O 6
quasi-bidirectional I/O 7
interrupt output (active LOW)
serial clock line
serial data line
supply voltage
Pin description for HVQFN16
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Description
address input 2
quasi-bidirectional I/O 0
quasi-bidirectional I/O 1
quasi-bidirectional I/O 2
quasi-bidirectional I/O 3
supply ground
quasi-bidirectional I/O 4
quasi-bidirectional I/O 5
quasi-bidirectional I/O 6
quasi-bidirectional I/O 7
interrupt output (active LOW)
serial clock line
serial data line
supply voltage
address input 0
address input 1
HVQFN16 package die supply ground is connected to both the V
SS
pin and the exposed center pad. The
V
SS
pin must be connected to supply ground for proper device operation. For enhanced thermal, electrical,
and board-level performance, the exposed pad needs to be soldered to the board using a corresponding
thermal pad on the board, and for proper heat conduction through the board thermal vias need to be
incorporated in the PCB in the thermal pad region.
PCA9674_PCA9674A
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 6 — 29 September 2011
5 of 32