NXP 8/16-bit I
2
C/SMBus
GPIO expanders
PCA9534/35/35C for
low-power applications
Low-power GPIO expanders for
portable applications
These I
2
C/SMBus-compatible devices offer an extremely low standby current (<1.0 µA max) and
make it easy to add programmable I/O ports to battery-powered applications.
Key features
4
Compatible with I
2
C-bus and SMBus
4
or 16 programmable GPIO compatible with most
8
processors
– Input or output
– Push-pull or open-drain outputs
– True bidirectional operation
4
Outputs can drive LEDs directly
– 25-mA (max) sink and 10-mA (max) source per bit
– 100-mA (max) capacity per 8-bit register
4
pen-drain interrupt output activates when input changes
O
state
4
Low standby current (I
DD
): <1.0 µA (max)
4
Operating voltage: 2.3 to 5.5 V
4
All I/O tolerant to 5.5 V
4
Temperature range: -40 to +85 °C
4
I
2
C-bus clock frequency: 0 to 400 kHz
4
High-volume CMOS process
4
Package options: SO, TSSOP, HVQFN, HWQFN
Applications
4
PIO expansion to support ACPI power switches, sensors,
G
push-buttons, LEDs, fans, and more
These general-purpose I/O (GPIO) expanders provide a
simple way to add I/O for ACPI power switches, sensors,
push-buttons, LEDs, fans, and functions, in battery-powered
I
2
C/SMBus applications.
The NXP PCA9534 is a 16-pin CMOS device that provides
eight bits of parallel GPIO expansion. It has an 8-bit
configuration register for I/O selection, an 8-bit input register,
an 8-bit output register, and an 8-bit polarity-inversion register
that lets the system master use the I
2
C/SMBus program and
configure the GPIO.
The PCA9535/35C is a 24-pin CMOS device that provides
16 bits of parallel GPIO expansion. It has two sets of the same
8-bit registers: configuration, input, output, and polarity-
inversion.
The PCA9534 and PCA9535 are low-power versions of the
NXP PCA9554, PCA9554A, and PCA9555. The I/O 100-kΩ
pull-up resistor has been removed, creating a very low standby
current (less than 1 µA) that maximizes battery life in portable
applications.
The PCA9535C an open-drain version of the
PCA9535, used to drive LEDs without sourcing
current. The system master can enable the I/O as
inputs or outputs by writing to the I/O configuration
bits. Data for each input or output is kept in the
corresponding input or output register. The polarity
of the read register can be inverted using the
polarity-inversion register. All registers can be read
by the system master.
All the devices are pin-to-pin and I
2
C-address
compatible with the NXP PCF857X series, but
various enhancements make software changes
necessary (see application note AN469).
The open-drain interrupt output is activated when
any input state differs from its corresponding input
port register state. The output notifies the system
master than an input state has changed.
Three hardware pins (A0, A1, A2) vary the fixed I C-
bus address and allow up to eight of these devices,
in any combination, to share the same I
2
C/SMBus.
2
A0
A1
A2
SCL
SDA
INPUT
FILTER
CONTROL
I
2
C/SMBus
8-BIT
INPUT/
OUTPUT
PORTS
I/O0
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
VINT
WRITE pulse
READ pulse
VDD
POWER-ON
RESET
LP
FILTER
Note: All I/Os are set to inputs at reset
VSS
INT
Block diagram
DATA FROM
SHIFT REGISTER
Pull-up resistor removed from PCA9554/55 output structure.
CONFIGURATION
REGISTER
D
FF
CK
OUTPUT PORT
REGISTER DATA
VDD
DATA FROM
SHIFT REGISTER
WRITE
CONFIGURATION
PULSE
Q
OUTPUT
PORT
REGISTER
D
FF
Q
Q1
100 K
Q
WRITE PULSE
CK
Q
I/O0 TO I/O7
INPUT
PORT
REGISTER
D
FF
Q
Q2
VSS
INPUT PORT
REGISTER DATA
READ PULSE
CK
Q
TO INT
POLARITY
INVERSION
REGISTER
INT
A1
A2
I/O0.0
A0
A1
A2
1
2
16 VDD
15 SDA
I/O0.1
I/O0.2
I/O0.3
I/O0.4
I/O0.5
I/O0.6
I/O0.7
V SS
1
2
3
4
24 VDD
23 SDA
22 SCL
21 A0
DATA FROM
SHIFT REGISTER
WRITE
POLARITY
PULSE
D
FF
CK
Q
POLARITY
REGISTER DATA
Q
PCA9535/35C
5
6
7
8
9
10
11
12
20 I/O1.7
19 I/O1.6
18 I/O1.5
17 I/O1.4
16 I/O1.3
15 I/O1.2
14 I/O1.1
13 I/O1.0
NOTE: At Power-on Reset, all registers return to default values.
PCA9534
3
14 SCL
13 INT
12 I/07
11 I/06
10 I/05
9
I/04
I/00 4
I/01 5
I/02 6
I/03 7
VSS
8
Simplified schematic of I/O0 to I/O7
SLAVE ADDRESS
0
1
0
0
A2
A1
A0
R/W
The outputs on the PCA9534/35 sink 25 mA and source 10 mA. The
open-drain outputs on the PCA9535C sink 25 mA, but don’t provide any
source current.
The functional diagrams and I/O schematics for all the devices are the
same, except the PCA9535 has two 8-bit blocks of I/O and the PCA9535C
has the upper transistor (Q1) disconnected.
FIXED
PROGRAMMABLE
PCA9534/35/35C
Pin configurations and I
2
C address
Order information
Package
SO
TSSOP
HVQFN
HWQFN
Container
Tube
T&R
Tube
T&R
T&R
T&R
PCA9534
PCA9534D
PCA9534D-T
PCA9534PW
PCA9534PW-T
PCA9534BS-T
PCA9535
PCA9535D
PCA9535D-T
PCA9535PW
PCA9535PW-T
PCA9535BS-T
PCA9535HF-T
PCA9535CHF-T
PCA9535C
PCA9535CD
PCA9535CD-T
PCA9535CPW
PCA9535CPW-T
www.nxp.com
© 2007 NXP N.V.
All rights reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The
information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and
may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof
does not convey nor imply any license under patent or other industrial or intellectual property rights.
Date of release: June 2007
Document order number: 9397 750 16020
Printed in the USA
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