IXD1415
Dual LDO Regulator with ON/OFF Switch
FEATURES
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Output Current up to 200 mA (300 mA max)
Dropout Voltage 95 mV @ I
OUT
= 100 mA, V
OUT
=
3.0 V
Operating Voltage Range 1.5 V – 6.0 V
Output Voltage Range from 0.8 V to 5.0 V with
0.05 V increments
Output Voltage Accuracy
± 1% @ V
OUT
> 2.0 V or ±20 mV
(A, B, E, F versions),
± 2% @ V
OUT
≥
1.5 V, or ±30 mV
(C, D, G, H versions)
Low Power Consumption at 28
µA
per channel
Standby Current less than 0.1 µA typical
PSRR at 65 dB for f = 1 kHz
ON/OFF switch for each channel
Current Limit, and Short Circuit Protection
Load Capacitor Auto Discharge
Low ESR Ceramic Capacitor compatible
0
Operating Ambient Temperature - 40 + 85 C
Packages : SOT-26, USP-6C, and USPN-6
EU RoHS Compliant, Pb Free
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APPLICATIONS
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Mobile phones
Cameras, VCRs
Various portable equipment
DESCRIPTION
The IXD1415 is a highly accurate, CMOS dual output
LDO voltage regulator with low output noise, high
ripple rejection ratio, and low dropout. It allows create
extremely dense power supply circuit with two high-
speed voltage regulators in an ultra small USP-6C
package.
The IC consists of two identical circuits, each of
which contains reference voltage source, an error
amplifier, a phase compensation circuit, a driver
transistor, an over-current protection, and a load
capacitor’s discharge switch.
The output voltage for each regulator sets
independently by laser trimming, and it is selectable
in 0.05 V increments within a range from 0.8 to 5.0V.
The enable (EN) function allows set each channel
into standby mode independently, reducing current
consumption to less than 0.1
µA
and simultaneously
discharging load capacitor through the internal auto-
discharge switch located between V
OUT
and V
SS
pins,
setting quickly the V
OUT
pin voltage to the V
SS
level.
The internal phase compensation allows the IXD1415
operate with a low ESR ceramic output capacitor C
L
.
The excellent transient response maintains high level
of output stability even during frequent load
fluctuations.
The over current protection circuit (the current limiter
and the fold back circuit) is built-in.
A cross talk between channels, which causes a
problem during load fluctuations, is greatly reduced,
because both regulators are completely isolated.
The IXD1415 is available in SOT-26, USP-6C, and
USPN-6 packages.
TYPICAL APPLICATION CIRCUIT
TYPICAL PERFORMANCE CHARACTERISTIC
Cross Talk
IXD1415 (V
OUT1
= 3.3 V, V
OUT2
= 2.5 V
0
V
IN
= 4.2 V, Ta = 25 C, t
R
= t
F
= 5 µs, C
IN
= C
L1
= C
L2
= 1 µF, I
OUT2
= 0.1
↔
50 mA
© 2013 IXYS Corp.
Characteristics subject to change without notice
1
Doc. No. IXD1415_DS, Rev. N0
IXD1415
ABSOLUTE MAXIMUM RATINGS
PARAMETER
Input Voltage
Output Current
Output Voltage1/2
EN1/EN2 Input Voltage
SOT-26W
Power Dissipation
2)
USP-6C
USPN-6
Operating Temperature Range
Storage Temperature Range
T
OPR
T
STG
P
D
SYMBOL
V
IN
I
OUT
V
OUT1
/ V
OUT2
V
EN1
/ V
EN2
RATINGS
– 0.3 ~ +6.5
500
1)
UNITS
V
mA
V
V
– 0.3 ~ V
IN
+ 0.3 or 6.5
– 0.3 ~ +6.5
250
100
1000 (PCB mounted)
100
– 40 ~ + 85
– 55 ~ +125
mW
0
0
C
C
All voltages are in respect to V
SS
1) Maximum current is limited by Power Dissipation as Pd
≥
(V
IN
-V
OUT1
) x I
OUT1
+ (V
IN
-V
OUT2
) x I
OUT2
)
2) This is a reference data taken by using the test board. Please refer to page 21 for details
ELECTRICAL OPERATING CHARACTERISTICS
Regulator1, Regulator 2
PARAMETER
Input Voltage
Versions
A, B, E, F
Output
Voltage
Versions
C, D, G, H
Maximum Output Current
Load Regulation
Dropout Voltage
4)
Supply Current
Standby Current
Input Line Regulation
Output Voltage Thermal
Stability
Ripple Rejection
Current Limit
Short Circuit Current
C
L
Discharge Resistance
5)
EN “H” Level Voltage
EN “L” Level Voltage
EN “H” Level Versions A - D
Current
Versions E - H
EN “L” Level Current
5)
NOTE:
Unless otherwise statedV
IN
= V
OUT(T)
+1.0 V,
1)
2)
3)
V
OUT(E)
is an Effective output voltage
V
OUT(T)
is a Nominal output voltage
See Table Voltage Chart
4)
Vdif = V
IN1
-V
OUT1
, where V
IN1
is a input voltage, which is
enough to keep V
OUT
= V
OUT(E)
x 0.98 with stable I
OUT.
IXD1415B, D, F, H versions only. IXD1415A, C, E, G
versions discharge with internal resistors R1/R2 (see
Block Diagram).
Doc. No. IXD1415_DS, Rev. N0
∆
∆
∆
PSRR
I
LIM
I
SHORT
R
DCH
V
CEH
V
CEL
I
CEH
I
CEL
I
OUT_MAX1
∆V
OUT
V
DIF1
I
IN
I
IN_STB
∆
∆
V
OUT(E)1)
SYMBOL
V
IN
V
OUT(T)
≥
2.0 V
V
OUT(T)
< 2.0 V
V
OUT(T)
≥
1.5 V
V
OUT(T)
< 2.0 V
V
IN
= V
EN
, 0.1 mA
≤
I
OUT
≤
100 mA
V
IN
= V
EN
, I
OUT
= 100 mA
I
OUT
= 0, V
IN
= V
EN
= V
OUT(T)
+ 1.0 V
V
IN
= 6.0 V, V
EN
= 0 V
V
OUT(T)
+ 0.5
≤
V
IN
≤
6.0 V,
V
OUT(T
)
≥
1.0 V
V
IN
= V
EN
,
I
OUT
= 10 mA
1.5 V
≤
V
IN
≤
6.0 V,
V
OUT(T
)
≤
0.95 V
V
IN
= V
EN
, I
OUT
= 10 mA
-40
0
C
≤
Ta
≤
85
0
C
V
IN
= V
OUT(T)
+ 1.0 V
DC
+ 0.5 Vp-p
AC
,
V
OUT(T)
≤
4.75 V, I
OUT
= 30 mA, f = 1 kHz
V
IN
= 5.75 V
DC
+ 0.5 Vp-p
AC
,
V
OUT(T)
≥
4.8 V, I
OUT
= 30 mA, f = 1 kHz
V
IN
= V
EN
V
IN
= V
EN
, V
OUT
= 0 V
V
IN
= 6.0 V, V
EN
= 0 V, V
OUT
= 4.0 V
CONDITIONS
MIN.
1.5
V
OUT(T)
x
0.99
V
OUT(T)
-
0.02
2)
V
V
OUT(T)
x
OUT(T)
0.98
V
OUT(T)
-
0.03
200
E-1
3)
E-2
3))
28
0.01
0.01
TYP.
MAX.
6.0
V
OUT(T)
x
1.01
V
OUT(T)
+
0.02
V
OUT(T)
x
1.02
V
OUT(T)
+
0.03
UNIT
V
Ta = 25
0
C
CIRCUIT
V
60
0.10
0.20
mA
mV
mV
µA
µA
%/V
ppm/
0
C
±100
65
210
300
20
550
V
IN
0.3
0.1
3.0
-0.1
0.1
dB
mA
mA
Ω
V
V
µA
µA
Table V
IN
= V
EN
V
IN
= V
EN
= 6.0 V
V
EN
= 0 V
1.2
0
-0.1
5)
© 2013 IXYS Corp.
Characteristics subject to change without notice
2
IXD1415
PIN CONFIGURATION
The dissipation pad for the
USP-6C package should be
solder-plated in respect with
mounting pattern and metal
mask to improve heat
dissipation and. mounting
strength. If the pad needs to
be connected to other pins,
it should be connected to
the V
SS
(No. 4) pin.
SOT-26 (TOP VIEW)
USP-6C (BOTTOM VIEW)
USPN-6 (BOTTOM VIEW)
PIN ASSIGNMENT
SOT-26
1
2
3
4
5
6
1)
PIN NUMBER
USP-6C
3
2
1
6
4
5
USPN-6
3
2
1
6
4
5
PIN NAME
EN1
V
IN
EN2
V
OUT2
V
SS
V
OUT1
FUNCTIONS
ON/OFF Control1
1)
LDO Regulators Power Input
ON/OFF Control2
1)
Output Voltage 2
Ground
Output Voltage 1
Versions E, F, G, H - LOW or OPEN – Standby mode, HIGH – Active, Versions A, B, C, D – LOW – Standby mode, HIGH – Active.
Versions A, B, C, D does not have EN pull-down resitors, so do not left these pins open.
BLOCK DIAGRAMS
IXD1415AA CC Series
IXD1415BB DD Series
Diodes inside the circuits are ESD protection diodes and parasitic diodes.
© 2013 IXYS Corp.
Characteristics subject to change without notice
5
Doc. No. IXD1415_DS, Rev. N0
FPGA/CPLD
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