DATASHEET
X9317
Low Noise, Low Power, 100 Taps, Digitally Controlled Potentiometer (XDCP™)
The
X9317
is a digitally controlled potentiometer (XDCP™). The
device consists of a resistor array, wiper switches, a control
section, and nonvolatile memory. The wiper position is
controlled by a 3-wire interface.
The potentiometer is implemented by a resistor array
composed of 99 resistive elements and a wiper switching
network. Between each element and at either end are tap
points accessible to the wiper terminal. The position of the
wiper element is controlled by the CS, U/D, and INC inputs. The
position of the wiper can be stored in nonvolatile memory and
then be recalled upon a subsequent power-up operation.
The device can be used as a three-terminal potentiometer for
voltage control or as a two-terminal variable resistor for current
control in a wide variety of applications.
FN8183
Rev.10.00
Dec 17, 2018
Features
• Solid-state potentiometer
• 3-wire serial up/down interface
• 100 wiper tap points
- Wiper position stored in nonvolatile memory and recalled
on power-up
• 99 resistive elements
- Temperature compensated
- End-to-end resistance range ±20%
• Low power CMOS
- V
CC
= 2.7V to 5.5V, and 5V ±10%
- Standby current <5µA
• High reliability
- Endurance, 100,000 data changes per bit
- Register data retention, 100 years
• R
TOTAL
values = 10kΩ, 50kΩ, 100kΩ
• Packages
- 8 Ld SOIC, TSSOP, and MSOP
• Pb-free (RoHS compliant)
Applications
• LCD bias control
• DC bias adjustment
• Gain and offset trim
• Laser diode bias control
• Voltage regulator output control
U/D
V
CC
(SUPPLY VOLTAGE)
INC
CS
UP/DOWN
COUNTER
99
98
97
R
H
UP/DOWN
(U/D)
INCREMENT
(INC)
DEVICE SELECT
(CS)
CONTROL
AND
MEMORY
R
H
7-BIT
NONVOLATILE
MEMORY
R
W
R
L
STORE AND
RECALL
CONTROL
CIRCUITRY
96
ONE
OF
ONE
HUNDRED
DECODER
2
WIPER
SWITCHES
RESISTOR
ARRAY
V
SS
(GROUND)
GENERAL
V
CC
V
SS
1
0
R
L
R
W
DETAILED
FIGURE 1. BLOCK DIAGRAM
FN8183 Rev.10.00
Dec 17, 2018
Page 1 of 14
X9317
Ordering Information
PART NUMBER
(Notes
1, 2, 3)
X9317WM8Z
X9317WM8IZ
X9317WS8Z
X9317WS8IZ
X9317WV8Z
X9317WV8IZ
X9317US8Z
X9317US8IZ
X9317UV8Z
X9317UV8IZ
X9317WM8Z-2.7
X9317WM8IZ-2.7
X9317WS8Z-2.7
X9317WS8IZ-2.7
X9317WV8Z-2.7
X9317WV8IZ-2.7
X9317US8Z-2.7
X9317US8IZ-2.7
X9317UV8Z-2.7
X9317UV8IZ-2.7
NOTES:
1. Add “T1” suffix for tape and reel. Please refer to
TB347
for details on reel specifications.
2. These Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate
plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Pb-free products are
MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for
X9317.
For more information on MSL please see tech brief
TB363.
PART MARKING
DCW
DCT
X9317W Z
X9317W ZI
9317W Z
9317W IZ
X9317U Z
X9317U ZI
9317U Z
9317U IZ
DCX
DCU
X9317W ZF
X9317W ZG
9317W FZ
AKZ
X9317U ZF
X9317U ZG
9317U FZ
9317U GZ
2.7 to 5.5
10
V
CC
LIMITS
(V)
5 ±10%
R
TOTAL
(kΩ)
10
TEMPERATURE
RANGE (°C)
0 to +70
-40 to +85
0 to +70
-40 to +85
0 to +70
-40 to +85
0 to +70
-40 to +85
0 to +70
-40 to +85
0 to +70
-40 to +85
0 to +70
-40 to +85
0 to +70
-40 to +85
0 to +70
-40 to +85
0 to +70
-40 to +85
PACKAGE
(RoHS Compliant)
8 Ld MSOP
8 Ld MSOP
8 Ld SOIC
8 Ld SOIC
8 Ld TSSOP
8 Ld TSSOP
8 Ld SOIC
8 Ld SOIC
8 Ld TSSOP
8 Ld TSSOP
8 Ld MSOP
8 Ld MSOP
8 Ld SOIC
8 Ld SOIC
8 Ld TSSOP
8 Ld TSSOP
8 Ld SOIC
8 Ld SOIC
8 Ld TSSOP
8 Ld TSSOP
PKG.
DWG. #
M8.118
M8.118
M8.15E
M8.15E
M8.173
M8.173
M8.15E
M8.15E
M8.173
M8.173
M8.118
M8.118
M8.15E
M8.15E
M8.173
M8.173
M8.15E
M8.15E
M8.173
M8.173
FN8183 Rev.10.00
Dec 17, 2018
Page 2 of 14
X9317
Pin Configurations
X9317
(8 LD TSSOP)
TOP VIEW
CS
V
CC
INC
U/D
1
2
3
4
8
7
6
5
R
L
R
W
V
SS
R
H
Pin Descriptions
SOIC/MSOP
1
TSSOP
3
SYMBOL
INC
BRIEF DESCRIPTION
Increment Toggling INC while CS
is low moves the wiper either up
or down.
Up/Down The U/D input controls
the direction of the wiper
movement.
The high terminal is equivalent to
one of the fixed terminals of a
mechanical potentiometer.
Ground
The wiper terminal is equivalent
to the movable terminal of a
mechanical potentiometer.
The low terminal is equivalent to
one of the fixed terminals of a
mechanical potentiometer.
Chip Select The device is
selected when the CS input is
LOW, and de-selected when CS is
high.
Supply Voltage
2
4
U/D
3
5
R
H
X9317
(8 LD SOIC, 8 LD MSOP)
TOP VIEW
INC
U/D
R
H
V
SS
1
2
3
4
8
7
6
5
V
CC
CS
R
L
R
W
4
5
6
7
V
SS
R
W
6
8
R
L
7
1
CS
8
2
V
CC
FN8183 Rev.10.00
Dec 17, 2018
Page 3 of 14
X9317
Absolute Maximum Ratings
I
W
(10s) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±8.8mA
R
H
, R
W
, R
L
to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +6V
Voltage on CS, INC, U/D and V
CC
with Respect to V
SS
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-1V to +7V
Thermal Information
Thermal Resistance (Typical)
JA
(°C/W)
JC
(°C/W)
SOIC Package (Notes
4, 5)
. . . . . . . . . . . . .
115
60
MSOP Package (Notes
4, 5)
. . . . . . . . . . . .
145
55
TSSOP Package (Notes
4, 5).
. . . . . . . . . . .
155
49
Junction Temperature Under Bias . . . . . . . . . . . . . . . . . . . -65C to +135C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see
TB493
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
4.
JA
is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief
TB379
for details.
5. For
JC
, the “case temp” location is taken at the package top center.
Potentiometer Specifications
(Industrial) and 0°C to +70°C (Commercial).
SYMBOL
R
TOTAL
V
RH
/
RL
PARAMETER
End-to-end Resistance Tolerance
R
H
/R
L
Terminal Voltage
Power Rating
R
W
Wiper Resistance
V
CC
= full range. Boldface limits apply across the operating temperature range, -40°C to +85°C
MIN
(Note
13)
-20
V
SS
TYP
(Note
9)
MAX
(Note
13)
+20
V
CC
10
200
400
-4.4
-120
1
V(R
H
) = V
CC
, V(R
L
) = 0V
V(R
H
) = V
CC
, V(R
L
) = 0V
V(R
H
) = V
CC
, V(R
L
) = 0V
-1
-0.2
±300
±20
See
“Equivalent Circuit” on page 5
X9317
X9317-2.7
4.5
2.7
10/10/25
5.5
5.5
+1
+0.2
400
1000
+4.4
TEST CONDITIONS/NOTES
See “Ordering Information” on
page 2
for
values
V
SS
= 0V
R
TOTAL
≥
10kΩ
I
W
= [V(R
H
) - V(R
L
)]/ R
TOTAL
, V
CC
= 5V
I
W
= [V(R
H
) - V(R
L
)]/ R
TOTAL
, V
CC
= 2.7V
UNIT
%
V
mW
Ω
Ω
mA
dBV
%
MI
(Note
8)
MI
(Note
8)
ppm/°C
ppm/°C
pF
V
V
I
W
Wiper Current (Note
10)
Noise (Note
12)
Resolution
Absolute Linearity (Note
6)
Relative Linearity (Note
7)
R
TOTAL
Temperature Coefficient (Note
10)
Ratiometric Temperature Coefficient
(Notes
10, 11)
See
“Test Circuit” on page 5
Ref: 1kHz
C
H
/C
L
/C
W
(Note
10)
V
CC
Potentiometer Capacitances
Supply Voltage
FN8183 Rev.10.00
Dec 17, 2018
Page 4 of 14
X9317
DC Electrical Specifications
(Industrial) and 0°C to +70°C (Commercial).
SYMBOL
I
CC1
PARAMETER
V
CC
= 5V ±10%. Boldface limits apply across the operating temperature range, -40°C to +85°C
MIN
(Note
13)
TYP
(Note
9)
MAX
(Note
13)
80
TEST CONDITIONS
CS = V
IL
, U/D = V
IL
or V
IH
and INC = V
IL
/V
IH
at
min. t
CYC
R
L
, R
H
, R
W
not connected
CS = V
IH
, U/D = V
IL
or V
IH
and INC = V
IL
or V
IH
.
R
L
, R
H
, R
W
not connected
CS
V
IH
, U/D and INC = V
IL
R
L
, R
H
, R
W
not connected
V
IN
= V
SS
to V
CC
UNIT
µA
VCC Active Current (Increment)
I
CC2
I
SB
I
LI
V
IH
V
IL
C
IN
(Note
10)
VCC Active Current (Store)
(non-volatile write)
Standby Supply Current
CS, INC, U/D Input Leakage Current
CS, INC, U/D Input HIGH Voltage
CS, INC, U/D Input LOW Voltage
CS, INC, U/D Input Capacitance
400
5
-10
V
CC
x 0.7
-0.5
+10
V
CC
+ 0.5
V
CC
x 0.1
10
µA
µA
µA
V
V
pF
V
CC
= 5V, V
IN
= V
SS
, T
A
= +25°C, f = 1MHz
Endurance and Data Retention
V
CC
= 5V ±10%, T
A
= Full Operating Temperature Range.
PARAMETER
Minimum Endurance
Data Retention
MIN
100,000
100
UNIT
Data changes per bit
Years
Test Circuit
TEST POINT
Equivalent Circuit
R
TOTAL
R
H
C
H
C
W
25pF
10pF
R
W
C
L
10pF
R
L
AC Conditions of Test
Input pulse levels
Input rise and fall times
Input reference levels
0V to 3V
10ns
1.5V
R
W
FORCE
CURRENT
AC Electrical Specifications
(Industrial) and 0°C to +70°C (Commercial).
SYMBOL
t
Cl
t
lD
(Note
10)
t
DI
(Note
10)
t
lL
t
lH
t
lC
t
CPHS
t
CPHNS
(Note
10)
t
IW
t
CYC
CS to INC Setup
V
CC
= 5V ±10%. Boldface limits apply across the operating temperature range, -40°C to +85°C
MIN
(Note
13)
50
100
1
960
960
1
10
100
1
2
5
TYP
(Note
9)
MAX
(Note
13)
PARAMETER
UNIT
ns
ns
µs
ns
ns
µs
ms
ns
µs
µs
INC HIGH to U/D Change
U/D to INC Setup
INC LOW Period
INC HIGH Period
INC Inactive to CS Inactive
CS Deselect Time (STORE)
CS Deselect Time (NO STORE)
INC to R
W
Change
INC Cycle Time
FN8183 Rev.10.00
Dec 17, 2018
Page 5 of 14
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