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AD5553CRM

Description
14-Bit DAC in µSOIC-8 Package
CategoryAnalog mixed-signal IC    converter   
File Size669KB,20 Pages
ManufacturerADI
Websitehttps://www.analog.com
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14-Bit DAC in µSOIC-8 Package

AD5553CRM Parametric

Parameter NameAttribute value
Source Url Status Check Date2013-05-01 14:56:13.446
Brand NameAnalog Devices Inc
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerADI
Parts packaging codeTSSOP
package instruction3 X 4.70 MM, MO-187AA, MSOP-8
Contacts8
Manufacturer packaging codeRM-8
Reach Compliance Codenot_compliant
ECCN codeEAR99
Converter typeD/A CONVERTER
Enter bit codeBINARY
Input formatSERIAL
JESD-30 codeS-PDSO-G8
JESD-609 codee0
length3 mm
Maximum linear error (EL)0.0061%
Humidity sensitivity level1
Number of digits14
Number of functions1
Number of terminals8
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Encapsulate equivalent codeTSSOP8,.19
Package shapeSQUARE
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)240
power supply5 V
Certification statusNot Qualified
Maximum seat height1.1 mm
Nominal settling time (tstl)0.5 µs
Maximum slew rate0.01 mA
Nominal supply voltage5 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationDUAL
Maximum time at peak reflow temperature30
width3 mm

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Data Sheet
FEATURES
16-bit resolution
AD5543
14-bit resolution
AD5553
±1 LSB DNL
±1 LSB INL
Low noise: 12 nV/√Hz
Low power: I
DD
= 10 µA
0.5 µs settling time
4-quadrant multiplying reference input
2 mA full-scale current ± 20%, with V
REF
= 10 V
Built-in R
FB
facilitates voltage conversion
3-wire interface
Ultracompact 8-lead MSOP and 8-lead SOIC packages
Current Output/Serial Input,
16-/14-Bit DACs
AD5543/AD5553
FUNCTIONAL BLOCK DIAGRAM
AD5543/AD5553
V
DD
R
FB
V
REF
DAC
I
OUT
16 OR 14
CS
CONTROL
LOGIC
DAC
REGISTER
16 OR 14
CLK
SDI
16-BIT/14-BIT SHIFT
REGISTER
GND
02917-001
APPLICATIONS
Automatic test equipment
Instrumentation
Digitally controlled calibration
Industrial control programmable logic controllers
1.0
0.8
0.6
0.4
INL (LSB)
Figure 1.
GENERAL DESCRIPTION
The
AD5543/AD5553
are precision 16-/14-bit, low power,
current output, small form factor digital-to-analog converters
(DACs). They are designed to operate from a single 5 V supply
with a ±10 V multiplying reference.
The applied external reference, V
REF
, determines the full-scale
output current. An internal feedback resistor (R
FB
) facilitates the
R-2R and temperature tracking for voltage conversion when
combined with an external operational amplifier.
A serial data interface offers high speed, 3-wire microcontroller-
compatible inputs using serial data in (SDI), clock (CLK), and
chip select (CS).
The
AD5543/AD5553
are packaged in ultracompact (3 mm ×
4.7 mm) 8-lead MSOP and 8-lead SOIC packages.
GAIN (dB)
0.2
0
–0.2
–0.4
–0.6
–0.8
0
4096
24,575
45,056
12,288
16,384
28,672
32,768
36,864
49,152
53,248
57,344
8152
20,480
40,960
61,440
65,536
–1.0
CODE
Figure 2. Integral Nonlinearity (INL)
2
0
–2
–4
–6
–8
–10
–12
02917-025
–14
10k
100k
1M
FREQUENCY (Hz)
10M
100M
Figure 3. Reference Multiplying Bandwidth
Rev. G
Document Feedback
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2002–2015 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
02917-002
AD5543/AD5553
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Timing Diagrams.......................................................................... 4
Absolute Maximum Ratings ............................................................ 5
ESD Caution .................................................................................. 5
Pin Configuration and Function Descriptions ............................. 6
Typical Performance Characteristics ............................................. 7
Circuit Operation ............................................................................. 9
DAC Section .................................................................................. 9
Serial Data Interface ....................................................................... 10
ESD Protection Circuits............................................................. 10
PCB Layout and Power Supply Bypassing .............................. 10
Data Sheet
Applications Information .............................................................. 11
Stability ........................................................................................ 11
Bipolar Output ............................................................................ 11
Programmable Current Source ................................................ 12
Reference Selection .................................................................... 12
Amplifier Selection .................................................................... 12
Evaluation Board ............................................................................ 14
System Development Platform ................................................. 14
AD5543/AD5553 to SPORT Interface .................................... 14
Waveform Generator ................................................................. 14
Operating the Evaluation Board .............................................. 14
Bill of Materials ........................................................................... 18
Outline Dimensions ....................................................................... 19
Ordering Guide .......................................................................... 20
REVISION HISTORY
12/15—Rev. F to Rev. G
Deleted Positive Output Voltage Section ..................................... 11
1/12—Rev. E to Rev. F
Added Figure 15, Renumbered Sequentially ................................ 8
Change to Table 9 ........................................................................... 13
Changes to Figure 27 ...................................................................... 15
Changes to Figure 28 ...................................................................... 16
Replaced Figure 29, Figure 30, and Figure 31 ............................. 17
2/11—Rev. D to Rev. E
Added Evaluation Board Section.................................................. 14
Updated Outline Dimensions ....................................................... 20
Changes to Ordering Guide .......................................................... 21
4/10—Rev. C to Rev. D
Changes to Figure 3 .......................................................................... 1
Changes to Table 1 ............................................................................ 3
Moved Timing Diagrams Section .................................................. 4
Moved Table 4 ................................................................................... 6
Delete Figure 13; Renumbered Sequentially ................................. 8
Changes to Figure 14 ........................................................................ 8
Changes to Figure 18 ........................................................................ 9
Moved Table 5 and Table 6 ............................................................ 10
Added Reference Selection Section and Amplifier Selection
Section .............................................................................................. 12
Added Table 7, Table 8, and Table 9;
Renumbered Sequentially.............................................................. 13
Rev. G | Page 2 of 20
10/09—Rev. B to Rev. C
Updated Outline Dimensions
..................................................... 14
Changes to Ordering Guide .......................................................... 15
7/09—Rev. A to Rev. B
Updated Format .................................................................. Universal
Change to Features Section ..............................................................1
Updated Outline Dimensions ....................................................... 14
Changes to Ordering Guide .......................................................... 15
2/03—Rev. 0 to Rev. A
Changes to Ordering Guide .............................................................3
12/02—Revision 0: Initial Version
Data Sheet
SPECIFICATIONS
AD5543/AD5553
V
DD
= 5 V ± 10%, V
SS
= 0 V, I
OUT
= virtual GND, GND = 0 V, V
REF
= 10 V, T
A
= full operating temperature range, unless otherwise noted.
Table 1.
Parameter
STATIC PERFORMANCE
1
Resolution
Relative Accuracy
Symbol
N
INL
Test Conditions/Comments
1 LSB = V
REF
/2
16
= 153 μV when V
REF
= 10 V (AD5543)
1 LSB = V
REF
/2
14
= 610 μV when V
REF
= 10 V (AD5553)
Grade:
AD5553C
Grade:
AD5543C
Grade:
AD5543B
Monotonic
Data = 0x0000, T
A
= 25°C
Data = 0x0000, T
A
= T
A
maximum
Data = 0xFFFF
5 V ± 10%
16
14
±1
±1
±2
±1
10
20
±1/±4
1
−15/+15
5
5
Data = 0xFFFF for
AD5543
Data = 0x3FFF for
AD5553
Code dependent
2
200
0.8
2.4
10
10
See Figure 4 and Figure 5
f
CLK
t
CH
t
CL
t
CSS
t
CSH
t
DS
t
DH
V
DD RANGE
I
DD
P
DISS
P
SS
50
10
10
0
10
5
10
4.5/5.5
10
0.055
0.006
MHz
ns min
ns min
ns min
ns min
ns min
ns min
V min/max
μA max
mW max
%/% max
Unit
Bits
Bits
LSB max
LSB max
LSB max
LSB max
nA max
nA max
mV typ/max
ppm/°C typ
V min/max
kΩ typ
3
pF typ
mA typ
pF typ
V max
V min
μA max
pF max
Differential Nonlinearity (DNL)
Output Leakage Current
Full-Scale Gain Error
Full-Scale Temperature Coefficient
2
REFERENCE INPUT
V
REF
Range
Input Resistance
Input Capacitance
2
ANALOG OUTPUT
Output Current
Output Capacitance
2
LOGIC INPUTS AND OUTPUT
Logic Input Low Voltage
Logic Input High Voltage
Input Leakage Current
Input Capacitance
2
INTERFACE TIMING
2, 4
Clock Input Frequency
Clock Width High
Clock Width Low
CS to Clock Setup
Clock to CS Hold
Data Setup
Data Hold
SUPPLY CHARACTERISTICS
Power Supply Range
Positive Supply Current
Power Dissipation
Power Supply Sensitivity
DNL
I
OUT
G
FSE
TCV
FS
V
REF
R
REF
C
REF
I
OUT
C
OUT
V
IL
V
IH
I
IL
C
IL
Logic inputs = 0 V
Logic inputs = 0 V
ΔV
DD
= ±5%
Rev. G | Page 3 of 20
AD5543/AD5553
Parameter
AC CHARACTERISTICS
4
Output Voltage Settling Time
Symbol
t
S
Test Conditions/Comments
To ±0.1% of full scale,
Data = 0x0000 to 0xFFFF to 0x0000 for
AD5543
Data = 0x0000 to 0x3FFF to 0x0000 for
AD5553
V
REF
= 100 mV rms, data = 0xFFFF
V
REF
= 0 V, data = 0x7FFF to 0x8000 for
AD5543
Data = 0x0000, V
REF
= 100 mV rms, same channel
C
S
= 1 and f
CLK
= 1 MHz
V
REF
= 5 V p-p, data = 0xFFFF, f = 1 kHz
f = 1 kHz, BW = 1 Hz
0.5
Data Sheet
5 V ± 10%
Unit
µs typ
Reference Multiplying Bandwidth (BW)
DAC Glitch Impulse
Feedthrough Error
Digital Feedthrough
Total Harmonic Distortion
Output Spot Noise Voltage
1
BW
Q
V
OUT
/V
REF
Q
THD
e
N
6.6
7
−83
7
−103
12
MHz typ
nV-sec
dB
nV-sec
dB typ
nV/√Hz
All static performance tests (except I
OUT
) are performed in a closed-loop system using an external precision
OP177
I-to-V converter amplifier. The
AD5543
R
FB
terminal is
tied to the amplifier output. The +IN operational amplifier is grounded, and the DAC I
OUT
is tied to the −IN operational amplifier. Typical values represent average
readings measured at 25°C.
2
These parameters are guaranteed by design and are not subject to production testing.
3
All ac characteristic tests are performed in a closed-loop system using an
AD8038
I-to-V converter amplifier except for THD where an
AD8065
was used.
4
All input control signals are specified with t
R
= t
F
= 2.5 ns (10% to 90% of 3 V) and timed from a voltage level of 1.5 V.
TIMING DIAGRAMS
SDI
D15
D14
D13
D12
D11
D10
D9
D8
D1
D0
CLK
t
DS
t
CSS
t
DH
t
CH
t
CL
t
CSH
Figure 4.
AD5543
Timing Diagram
SDI
D13
D12
D11
D10
D9
D8
D7
D6
D1
D0
CLK
t
DS
t
CSS
t
DH
t
CH
t
CL
t
CSH
Figure 5.
AD5553
Timing Diagram
Rev. G | Page 4 of 20
02917-017
CS
02917-016
CS
Data Sheet
ABSOLUTE MAXIMUM RATINGS
Table 2.
AD5543/AD5553
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
Parameter
V
DD
to GND
V
REF
to GND
Logic Inputs to GND
V(I
OUT
) to GND
Input Current to Any Pin Except Supplies
Package Power Dissipation
Thermal Resistance, θ
JA
8-Lead Surface Mount (MSOP)
8-Lead Surface Mount (SOIC)
Maximum Junction Temperature (T
J Max
)
Operating Temperature Range
Model B and Model C
Storage Temperature Range
Lead Temperature
R-8, RM-8 (Vapor Phase, 60 sec)
R-8, RM-8 (Infrared, 15 sec)
Rating
−0.3 V to +8 V
−18 V to +18 V
−0.3 V to +8 V
−0.3 V to V
DD
+ 0.3 V
±50 mA
(T
J Max
− T
A
)/θ
JA
150°C/W
100°C/W
150°C
−40°C to +85°C
−65°C to +150°C
215°C
220°C
ESD CAUTION
Rev. G | Page 5 of 20

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