Discontinued (9/98 - last order; 3/99 last ship)
IBM01161601M x 1612/8, 5.0VMMDD35DSU-011010627. IBM0116160P1M x 1612/8, 3.3V, LP, SRMMDD35DSU-011010627. IBM0116160M 1M x 1612/8, 5.0V, LP, SRMMDD35DSU-011010627. IBM011616B1M x 1612/8, 3.3VMMDD35DSU-011010627.
IBM0116160 IBM0116160M
IBM0116160B IBM0116160P
1M x 16 12/8 DRAM
Features
• 1,048,576 word by 16 bit organization
• Single 3.3V
±
0.3V or 5.0V
±
0.5V power supply
• Standard Power (SP) and Low Power (LP)
• 4096 Refresh Cycles
- 64 ms Refresh Rate (SP version)
- 256 ms Refresh Rate (LP version)
• High Performance:
-50
t
RAC
RAS Access Time
t
CAC
CAS Access Time
t
AA
Column Address Access Time
t
RC
Cycle Time
t
PC
Fast Page Mode Cycle Time
50
13
25
95
35
-60
60
15
30
110
40
Units
ns
ns
ns
• Low Power Dissipation
- Active (max) - 50 mA / 45 mA
- Standby: TTL Inputs (max) - 2.0 mA
- Standby: CMOS Inputs (max)
- 1.0 mA (SP version)
- 0.1 mA (LP version)
- Self Refresh (LP version only)
- 200µA (3.3 Volt)
- 300µA (5.0 Volt)
• 2 CAS
• Fast Page Mode
• Read-Modify-Write
• RAS Only and CAS before RAS Refresh
• Hidden Refresh
ns
ns
• Package: TSOP-II 50/44 (400mil x 825mil)
SOJ 42/42 (400mil)
Description
The IBM0116160 is a dynamic RAM organized
1,048,576 words by 16 bits, which has a very low
“sleep mode” power consumption option. These
devices are fabricated in IBM’s advanced 0.5µm
CMOS silicon gate process technology. The circuit
and process have been carefully designed to pro-
vide high performance, low power dissipation, and
high reliability. The devices operate with a single
3.3V
±
0.3V or 5.0V
±
0.5V power supply. The 20
addresses required to access any bit of data are
multiplexed (12 are strobed with RAS, 8 are strobed
with CAS).
Pin Assignments
(Top View)
50/44 TSOP
V
CC
IO0
IO1
IO2
IO3
V
CC
IO4
IO5
IO6
IO7
NC
NC
NC
WE
RAS
A11
A10
A0
A1
A2
A3
V
CC
1
2
3
4
5
6
7
8
9
10
11
15
16
17
18
19
20
21
22
23
24
25
50
49
48
47
46
45
44
43
42
41
40
36
35
34
33
32
31
30
29
28
27
26
V
SS
IO15
IO14
IO13
IO12
V
SS
IO11
IO10
IO9
IO8
NC
NC
LCAS
UCAS
OE
A9
A8
A7
A6
A5
A4
V
SS
V
CC
IO0
IO1
IO2
IO3
V
CC
IO4
IO5
IO6
IO7
NC
NC
WE
RAS
A11
A10
A0
A1
A2
A3
V
CC
Pin Description
42/42 SOJ
RAS
V
SS
IO15
IO14
IO13
IO12
V
SS
IO11
IO10
IO9
IO8
NC
LCAS
UCAS
OE
A9
A8
A7
A6
A5
A4
V
SS
Row Address Strobe
L/U Column Address Strobe
Read/Write Input
Address Inputs
Output Enable
Data Input/Output
Power (+3.3V or +5.0V)
Ground
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
LCAS / UCAS
WE
A0 - A11
OE
I/O0 - I/O15
V
CC
V
SS
43G9618
SA14-4207-06
Revised 4/97
©IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
Page 1 of 27
Discontinued (9/98 - last order; 3/99 last ship)
IBM0116160
IBM0116160M
IBM0116160B IBM0116160P
1M x 16 12/8 DRAM
Ordering Information
Part Number
IBM0116160T3 -50
IBM0116160T3 -60
IBM0116160BT3 -50
IBM0116160BT3 -60
IBM0116160J3 -50
IBM0116160J3 -60
IBM0116160BJ3 -50
IBM0116160BJ3 -60
IBM0116160MT3 -50
IBM0116160MT3 -60
IBM0116160PT3 -50
IBM0116160PT3 -60
IBM0116160MJ3 -50
IBM0116160MJ3 -60
IBM0116160PJ3 -50
IBM0116160PJ3 -60
SP / LP
SP
SP
SP
SP
SP
SP
SP
SP
LP
LP
LP
LP
LP
LP
LP
LP
Self Refresh Power Supply
No
No
No
No
No
No
No
No
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
5.0V
5.0V
3.3V
3.3V
5.0V
5.0V
3.3V
3.3V
5.0V
5.0V
3.3V
3.3V
5.0V
5.0V
3.3V
3.3V
Speed
50ns
60ns
50ns
60ns
50ns
60ns
50ns
60ns
50ns
60ns
50ns
60ns
50ns
60ns
50ns
60ns
Package
400mil TSOP-II 50/44
400mil TSOP-II 50/44
400mil TSOP-II 50/44
400mil TSOP-II 50/44
400mil SOJ 42/42
400mil SOJ 42/42
400mil SOJ 42/42
400mil SOJ 42/42
400mil TSOP-II 50/44
400mil TSOP-II 50/44
400mil TSOP-II 50/44
400mil TSOP-II 50/44
400mil SOJ 42/42
400mil SOJ 42/42
400mil SOJ 42/42
400mil SOJ 42/42
Notes
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1. SP = Standard Power version (IBM0116160 and IBM0116160B); LP = Low Power version (IBM0116160M and IBM00116160P)
©IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
43G9618
SA14-4207-06
Revised 4/97
Page 2 of 27
Discontinued (9/98 - last order; 3/99 last ship)
IBM0116160 IBM0116160M
IBM0116160B IBM0116160P
1M x 16 12/8 DRAM
Block Diagram
I/O0
I/O15
Vss
Vcc
(5.0 Volt version)
(to OCDs)
16
16
Regulator
V
DD
(internal)
Data In Buffer
Data Out Buffer
OE
WE
&
16
16
UCAS
OR
CAS Clock
Generator
LCAS
A0
A1
8
Column Address
Buffer (8)
8
Column Decoder and I/O Gate
16
Sense Amplifiers
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
12
12
Row Address
Buffer (12)
12
Refresh Counter
(12)
Row Decoder
Refresh
Controller
256 x 16
Memory Array
4096
4096 x 256 x 16
RAS
RAS Clock
Generator
43G9618
SA14-4207-06
Revised 4/97
©IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
Page 3 of 27
Discontinued (9/98 - last order; 3/99 last ship)
IBM0116160
IBM0116160M
IBM0116160B IBM0116160P
1M x 16 12/8 DRAM
Truth Table
Function
Standby
Read: Word
Read: Lower Byte
Read: Upper Byte
Write: Word
Early-Write
Write: Lower Byte
Early-Write
Write: Upper Byte
Early-Write
Read-Modify-Write
Fast Page Mode
Read
Fast Page Mode
Write
Fast Page Mode
Read-Modify-Write
RAS-Only Refresh
CAS-Before-RAS Refresh
Read
Hidden Refresh
Write
Self Refresh (LP version only)
L→H→L
H→L
L
L
L
L
L→H
H
X
X
Row
X
Col
X
Data In
High Impedance
1st Cycle
2nd Cycle
1st Cycle
2nd Cycle
1st Cycle
2nd Cycle
RAS
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H→L
L→H→L
LCAS
H→X
L
L
H
L
L
H
L
H→L
H→L
H→L
H→L
H→L
H→L
H
L
L
UCAS
H→X
L
H
L
L
H
L
L
H→L
H→L
H→L
H→L
H→L
H→L
H
L
L
WE
X
H
H
H
L
L
L
H→L
H
H
L
L
H→L
H→L
X
H
H
OE
X
L
L
L
X
X
X
L→H
L
L
X
X
L→H
L→H
X
X
L
Row
Column
Address Address
X
Row
Row
Row
Row
Row
Row
Row
Row
N/A
Row
N/A
Row
N/A
Row
X
Row
X
Col
Col
Col
Col
Col
Col
Col
Col
Col
Col
Col
Col
Col
N/A
N/A
Col
I/O0 - I/O15
High Impedance
Data Out
Lower Byte: Data Out
Upper Byte: High-Z
Lower Byte: High-Z
Upper Byte: Data Out
Data In
Lower Byte: Data In
Upper Byte: High-Z
Lower Byte: High-Z
Upper Byte: Data In
Data Out, Data In
Data Out
Data Out
Data In
Data In
Data Out, Data In
Data Out, Data In
High Impedance
High Impedance
Data Out
©IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
43G9618
SA14-4207-06
Revised 4/97
Page 4 of 27
Discontinued (9/98 - last order; 3/99 last ship)
IBM0116160 IBM0116160M
IBM0116160B IBM0116160P
1M x 16 12/8 DRAM
Absolute Maximum Ratings
Rating
Symbol
V
CC
V
IN
V
OUT
T
OPR
T
STG
P
D
I
OUT
Parameter
3.3 Volt Device
Power Supply Voltage
Input Voltage
Output Voltage
Operating Temperature
Storage Temperature
Power Dissipation
Short Circuit Output Current
-0.5 to +4.6
-0.5 to min (V
CC
+0.5, 4.6)
-0.5 to min (V
CC
+0.5, 4.6)
0 to +70
-55 to +150
1.0
50
5.0 Volt Device
-1.0 to +7.0
-0.5 to min (V
CC
+0.5, 7.0)
-0.5 to min (V
CC
+0.5, 7.0)
0 to +70
-55 to +150
1.0
50
V
V
V
°C
°C
W
mA
1
1
1
1
1
1
1
Units
Notes
1. Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reli-
ability.
Recommended DC Operating Conditions
(T
A
= 0 to 70˚C)
3.3 Volt Device
Symbol
V
CC
V
IH
V
IL
Parameter
Min.
Supply Voltage
Input High Voltage
Input Low Voltage
3.0
2.0
-0.5
Typ.
3.3
—
—
Max.
3.6
V
CC
+ 0.5
0.8
Min.
4.5
2.4
-0.5
Typ.
5.0
—
—
Max.
5.5
V
CC
+ 0.5
0.8
V
V
V
1
1, 2
1, 2
5.0 Volt Device
Units
Notes
1. All voltages referenced to V
SS
.
2. V
IH
may overshoot to V
CC
+ 1.2V for pulse widths of
≤
4.0ns with 3.3 Volt, or V
CC
+ 2.0V for pulse widths of
≤
4.0ns (or V
CC
+ 1.0V
for
≤
8.0ns) with 5.0 Volt. Additionally, V
IL
may undershoot to -2.0V for pulse widths
≤
4.0ns with 3.3 Volt, or to -2.0V for pulse
widths
≤
4.0ns (or -1.0V for
≤
8.0ns) with 5.0 Volt. Pulse widths measured at 50% points with amplitude measured peak to DC ref-
erence.
Capacitance
(T
A
= 25°C, V
CC
= 3.3V
±
0.3V or V
CC
= 5.0V
±
0.5V)
Symbol
C
I1
C
I2
C
O
Parameter
Input Capacitance (A0 - A11)
Input Capacitance (RAS, LCAS, UCAS, WE, OE)
Output Capacitance (I/O0 - I/O15)
Min.
—
—
—
Max.
5
7
7
Units
pF
pF
pF
Notes
1
1
1
1. Input capacitance measurements made with rise time shift method with CAS = V
IH
to disable output.
43G9618
SA14-4207-06
Revised 4/97
©IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
Page 5 of 27
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