IBM0118160 1M x 1610/10, 5.0V. IBM0118160P1M x 1610/10, 3.3V, LP, SR. IBM0118160M 1M x 1610/10, 5.0V, LP, SR. IBM0118160B1M x 1610/10, 3.3V.
IBM0118160 IBM0118160M
IBM0118160B IBM0118160P
1M x 16 10/10 DRAM
Features
• 1,048,576 word by 16 bit organization
• Single 3.3V
±
0.3V or 5.0V
±
0.5V power supply
• Standard Power (SP) and Low Power (LP)
• 1024 Refresh Cycles
- 16 ms Refresh Rate (SP version)
- 128 ms Refresh Rate (LP version)
• High Performance:
-50
t
RAC
RAS Access Time
t
CAC
CAS Access Time
t
AA
Column Address Access Time
t
RC
Cycle Time
t
PC
Fast Page Mode Cycle Time
50ns
13ns
25ns
-60
60ns
15ns
30ns
-70
70ns
20ns
35ns
• Low Power Dissipation
- Active (max) - 185 mA / 160 mA / 140 mA
- Standby: TTL Inputs (max) - 2.0 mA
- Standby: CMOS Inputs (max)
- 1.0 mA (SP version)
- 0.2 mA (LP version)
- Self Refresh (LP version only)
- 200µA (3.3 Volt)
- 300µA (5.0 Volt)
• 2 CAS
• Read-Modify-Write
• RAS Only and CAS before RAS
• Hidden Refresh
• Package:
- TSOP-II 50/44 (400milx825mil)
- SOJ 42/42 (400mil)
95ns 110ns 130ns
35ns
40ns
45ns
Description
The IBM0118160 is a dynamic RAM organized
1,048,576 words by 16 bits, which has a very low
“sleep mode” power consumption option. These
devices are fabricated in IBM’s advanced 0.5µm
CMOS silicon gate process technology. The circuit
and process have been carefully designed to pro-
vide high performance, low power dissipation, and
high reliability. The devices operate with a single
3.3V
±
0.3V or 5.0V
±
0.5V power supply. The 20
addresses required to access any bit of data are
multiplexed (10 are strobed with RAS, 10 are
strobed with CAS).
Pin Assignments
(Top View)
50/44 TSOP
V
CC
IO0
IO1
IO2
IO3
V
CC
IO4
IO5
IO6
IO7
NC
NC
NC
WE
RAS
NC
NC
A0
A1
A2
A3
V
CC
1
2
3
4
5
6
7
8
9
10
11
15
16
17
18
19
20
21
22
23
24
25
50
49
48
47
46
45
44
43
42
41
40
36
35
34
33
32
31
30
29
28
27
26
V
SS
IO15
IO14
IO13
IO12
V
SS
IO11
IO10
IO9
IO8
NC
NC
LCAS
UCAS
OE
A9
A8
A7
A6
A5
A4
V
SS
V
CC
IO0
IO1
IO2
IO3
V
CC
IO4
IO5
IO6
IO7
NC
NC
WE
RAS
NC
NC
A0
A1
A2
A3
V
CC
Pin Description
42/42 SOJ
RAS
V
SS
IO15
IO14
IO13
IO12
V
SS
IO11
IO10
IO9
IO8
NC
LCAS
UCAS
OE
A9
A8
A7
A6
A5
A4
V
SS
Row Address Strobe
L/U Column Address Strobe
Read/Write Input
Address Inputs
Output Enable
Data Input/Output
Power (+3.3V or +5.0V)
Ground
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
LCAS / UCAS
WE
A0 - A9
OE
I/O0 - I/O15
V
CC
V
SS
43G9388
SA14-4209-04
Revised 11/96
©IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
Page 1 of 26
IBM0118160 IBM0118160M
IBM0118160B IBM0118160P
1M x 16 10/10 DRAM
Absolute Maximum Ratings
Rating
Symbol
V
CC
V
IN
V
OUT
T
OPR
T
STG
P
D
I
OUT
Parameter
3.3 Volt Device
Power Supply Voltage
Input Voltage
Output Voltage
Operating Temperature
Storage Temperature
Power Dissipation
Short Circuit Output Current
-0.5 to +4.6
-0.5 to min (V
CC
+0.5, 4.6)
-0.5 to min (V
CC
+0.5, 4.6)
0 to +70
-55 to +150
1.0
50
5.0 Volt Device
-1.0 to +7.0
-0.5 to min (V
CC
+0.5, 7.0)
-0.5 to min (V
CC
+0.5, 7.0)
0 to +70
-55 to +150
1.0
50
V
V
V
°C
°C
W
mA
1
1
1
1
1
1
1
Units
Notes
1. Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reli-
ability.
Recommended DC Operating Conditions
3.3 Volt Device
Symbol
V
CC
V
IH
V
IL
Parameter
Min.
Supply Voltage
Input High Voltage
Input Low Voltage
3.0
2.0
-0.5
Typ.
3.3
—
—
(T
A
= 0 to 70˚C)
5.0 Volt Device
Units
Notes
1
1, 2
1, 2
Max.
3.6
V
CC
+ 0.5
0.8
Min.
4.5
2.4
-0.5
Typ.
5.0
—
—
Max.
5.5
V
CC
+ 0.5
0.8
V
V
V
1. All voltages referenced to V
SS
.
2. V
IH
may overshoot to V
CC
+ 1.2V for pulse widths of
≤
4.0ns with 3.3 Volt, or V
CC
+ 2.0V for pulse widths of
≤
4.0ns (or V
CC
+ 1.0V
for
≤
8.0ns) with 5.0 Volt. Additionally, V
IL
may undershoot to -2.0V for pulse widths
≤
4.0ns with 3.3 Volt, or to -2.0V for pulse
widths
≤
4.0ns (or -1.0V for
≤
8.0ns) with 5.0 Volt. Pulse widths measured at 50% points with amplitude measured peak to DC ref-
erence.
Capacitance
(T
A
= 25°C, V
CC
= 3.3V
±
0.3V or V
CC
= 5.0V
±
0.5V)
Symbol
C
I1
C
I2
C
O
Parameter
Input Capacitance (A0 - A9)
Input Capacitance (RAS, LCAS, UCAS, WE, OE)
Output Capacitance (I/O0 - I/O15)
Min.
—
—
—
Max.
5
7
7
Units
pF
pF
pF
Notes
1
1
1
1. Input capacitance measurements made with rise time shift method with CAS = V
IH
to disable output.
43G9388
SA14-4209-04
Revised 11/96
©IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
Page 5 of 26
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